Merge branches 'clk-ti', 'clk-allwinner', 'clk-qcom', 'clk-sa' and 'c…

…lk-aspeed' into clk-next

 - Qualcomm MSM8998 GPU clk controllers
 - Qualcomm SC7180 GCC and RPMH clk controllers
 - Qualcomm QCS404 Q6SSTOP clk controllers
 - Use struct_size() some more in various clk drivers

* clk-ti:
  clk/ti/adpll: allocate room for terminating null
  ARM: dts: omap3: fix DPLL4 M4 divider max value
  clk: ti: divider: convert to use min,max,mask instead of width
  clk: ti: divider: cleanup ti_clk_parse_divider_data API
  clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table
  clk: ti: am43xx: drop idlest polling from gfx clock
  clk: ti: am33xx: drop idlest polling from gfx clock
  clk: ti: am33xx: drop idlest polling from pruss clkctrl clock
  clk: ti: am43xx: drop idlest polling from pruss clkctrl clock
  clk: ti: omap5: Drop idlest polling from IPU & DSP clkctrl clocks
  clk: ti: omap4: Drop idlest polling from IPU & DSP clkctrl clocks
  clk: ti: dra7xx: Drop idlest polling from IPU & DSP clkctrl clocks
  clk: ti: omap5: add IVA subsystem clkctrl data
  dt-bindings: clk: add omap5 iva clkctrl definitions
  clk: ti: clkctrl: add new exported API for checking standby info
  clk: ti: clkctrl: convert to use bit helper macros instead of bitops
  clk: ti: clkctrl: fix setting up clkctrl clocks

* clk-allwinner:
  clk: sunxi-ng: h3: Export MBUS clock
  clk: sunxi-ng: h6: Allow GPU to change parent rate
  clk: sunxi-ng: h6: Use sigma-delta modulation for audio PLL

* clk-qcom:
  clk: qcom: rpmh: Reuse sdm845 clks for sm8150
  clk: qcom: Add MSM8998 GPU Clock Controller (GPUCC) driver
  clk: qcom: Allow constant ratio freq tables for rcg
  clk: qcom: smd: Add missing pnoc clock
  clk: qcom: Enumerate clocks and reset needed to boot the 8998 modem
  clk: qcom: clk-rpmh: Add support for RPMHCC for SC7180
  dt-bindings: clock: Introduce RPMHCC bindings for SC7180
  dt-bindings: clock: Add YAML schemas for the QCOM RPMHCC clock bindings
  clk: qcom: Add Global Clock controller (GCC) driver for SC7180
  dt-bindings: clock: Add sc7180 GCC clock binding
  dt-bindings: clock: Add YAML schemas for the QCOM GCC clock bindings
  clk: qcom: common: Return NULL from clk_hw OF provider
  clk: qcom: rcg: update the DFS macro for RCG
  clk: qcom: remove unneeded semicolon
  clk: qcom: Add Q6SSTOP clock controller for QCS404
  dt-bindings: clock: qcom: Add QCOM Q6SSTOP clock controller bindings

* clk-sa:
  drivers/clk: convert VL struct to struct_size

* clk-aspeed:
  clk: aspeed: Add RMII RCLK gates for both AST2500 MACs
  clk: ast2600: Add RMII RCLK gates for all four MACs
  dt-bindings: clock: Add AST2600 RMII RCLK gate definitions
  dt-bindings: clock: Add AST2500 RMII RCLK definitions

Documentation/devicetree/bindings/clock/qcom,gcc.yaml

@@ -0,0 +1,188 @@
+# SPDX-License-Identifier: GPL-2.0-only
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/clock/qcom,gcc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Global Clock & Reset Controller Binding
+
+maintainers:
+  - Stephen Boyd <sboyd@kernel.org>
+  - Taniya Das <tdas@codeaurora.org>
+
+description: |
+  Qualcomm global clock control module which supports the clocks, resets and
+  power domains.
+
+properties:
+  compatible :
+    enum:
+       - qcom,gcc-apq8064
+       - qcom,gcc-apq8084
+       - qcom,gcc-ipq8064
+       - qcom,gcc-ipq4019
+       - qcom,gcc-ipq8074
+       - qcom,gcc-msm8660
+       - qcom,gcc-msm8916
+       - qcom,gcc-msm8960
+       - qcom,gcc-msm8974
+       - qcom,gcc-msm8974pro
+       - qcom,gcc-msm8974pro-ac
+       - qcom,gcc-msm8994
+       - qcom,gcc-msm8996
+       - qcom,gcc-msm8998
+       - qcom,gcc-mdm9615
+       - qcom,gcc-qcs404
+       - qcom,gcc-sc7180
+       - qcom,gcc-sdm630
+       - qcom,gcc-sdm660
+       - qcom,gcc-sdm845
+       - qcom,gcc-sm8150
+
+  clocks:
+    minItems: 1
+    maxItems: 3
+    items:
+      - description: Board XO source
+      - description: Board active XO source
+      - description: Sleep clock source
+
+  clock-names:
+    minItems: 1
+    maxItems: 3
+    items:
+      - const: bi_tcxo
+      - const: bi_tcxo_ao
+      - const: sleep_clk
+
+  '#clock-cells':
+    const: 1
+
+  '#reset-cells':
+    const: 1
+
+  '#power-domain-cells':
+    const: 1
+
+  reg:
+    maxItems: 1
+
+  nvmem-cells:
+    minItems: 1
+    maxItems: 2
+    description:
+      Qualcomm TSENS (thermal sensor device) on some devices can
+      be part of GCC and hence the TSENS properties can also be part
+      of the GCC/clock-controller node.
+      For more details on the TSENS properties please refer
+      Documentation/devicetree/bindings/thermal/qcom-tsens.txt
+
+  nvmem-cell-names:
+    minItems: 1
+    maxItems: 2
+    description:
+      Names for each nvmem-cells specified.
+    items:
+      - const: calib
+      - const: calib_backup
+
+  'thermal-sensor-cells':
+    const: 1
+
+  protected-clocks:
+    description:
+       Protected clock specifier list as per common clock binding
+
+required:
+  - compatible
+  - reg
+  - '#clock-cells'
+  - '#reset-cells'
+  - '#power-domain-cells'
+
+if:
+  properties:
+    compatible:
+      contains:
+        const: qcom,gcc-apq8064
+
+then:
+  required:
+    - nvmem-cells
+    - nvmem-cell-names
+    - '#thermal-sensor-cells'
+
+else:
+  if:
+    properties:
+      compatible:
+        contains:
+          enum:
+            - qcom,gcc-sm8150
+            - qcom,gcc-sc7180
+  then:
+    required:
+       - clocks
+       - clock-names
+
+
+examples:
+  # Example for GCC for MSM8960:
+  - |
+    clock-controller@900000 {
+      compatible = "qcom,gcc-msm8960";
+      reg = <0x900000 0x4000>;
+      #clock-cells = <1>;
+      #reset-cells = <1>;
+      #power-domain-cells = <1>;
+    };
+
+
+  # Example of GCC with TSENS properties:
+  - |
+    clock-controller@900000 {
+      compatible = "qcom,gcc-apq8064";
+      reg = <0x00900000 0x4000>;
+      nvmem-cells = <&tsens_calib>, <&tsens_backup>;
+      nvmem-cell-names = "calib", "calib_backup";
+      #clock-cells = <1>;
+      #reset-cells = <1>;
+      #power-domain-cells = <1>;
+      #thermal-sensor-cells = <1>;
+    };
+
+  # Example of GCC with protected-clocks properties:
+  - |
+    clock-controller@100000 {
+      compatible = "qcom,gcc-sdm845";
+      reg = <0x100000 0x1f0000>;
+      protected-clocks = <187>, <188>, <189>, <190>, <191>;
+      #clock-cells = <1>;
+      #reset-cells = <1>;
+      #power-domain-cells = <1>;
+    };
+
+  # Example of GCC with clock node properties for SM8150:
+  - |
+    clock-controller@100000 {
+      compatible = "qcom,gcc-sm8150";
+      reg = <0x00100000 0x1f0000>;
+      clocks = <&rpmhcc 0>, <&rpmhcc 1>, <&sleep_clk>;
+      clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk";
+      #clock-cells = <1>;
+      #reset-cells = <1>;
+      #power-domain-cells = <1>;
+     };
+
+  # Example of GCC with clock nodes properties for SC7180:
+  - |
+    clock-controller@100000 {
+      compatible = "qcom,gcc-sc7180";
+      reg = <0x100000 0x1f0000>;
+      clocks = <&rpmhcc 0>, <&rpmhcc 1>;
+      clock-names = "bi_tcxo", "bi_tcxo_ao";
+      #clock-cells = <1>;
+      #reset-cells = <1>;
+      #power-domain-cells = <1>;
+    };
+...

Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml

@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,q6sstopcc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Q6SSTOP clock Controller
+
+maintainers:
+  - Govind Singh <govinds@codeaurora.org>
+
+properties:
+  compatible:
+    const: "qcom,qcs404-q6sstopcc"
+
+  reg:
+    items:
+      - description: Q6SSTOP clocks register region
+      - description: Q6SSTOP_TCSR register region
+
+  clocks:
+    items:
+      - description: ahb clock for the q6sstopCC
+
+  '#clock-cells':
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    q6sstopcc: clock-controller@7500000 {
+      compatible = "qcom,qcs404-q6sstopcc";
+      reg = <0x07500000 0x4e000>, <0x07550000 0x10000>;
+      clocks = <&gcc 141>;
+      #clock-cells = <1>;
+    };