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mtd: rawnand: davinci: Reduce polling interval in NAND_OP_WAITRDY_INSTR
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For each NAND_OP_WAITRDY_INSTR operation, the NANDFSR register is
polled only once every 100 us to check for the EMA_WAIT pin. This
isn't frequent enough and causes delays in NAND accesses.

Set the polling interval to 5 us. It increases the page read speed
reported by flash_speed by ~30% (~10% on page writes).

Signed-off-by: Bastien Curutchet <bastien.curutchet@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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Bastien Curutchet authored and Miquel Raynal committed Jan 8, 2025
1 parent b937186 commit 6df2d95
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion drivers/mtd/nand/raw/davinci_nand.c
Original file line number Diff line number Diff line change
Expand Up @@ -736,7 +736,7 @@ static int davinci_nand_exec_instr(struct davinci_nand_info *info,
case NAND_OP_WAITRDY_INSTR:
timeout_us = instr->ctx.waitrdy.timeout_ms * 1000;
ret = readl_relaxed_poll_timeout(info->base + NANDFSR_OFFSET,
status, status & BIT(0), 100,
status, status & BIT(0), 5,
timeout_us);
if (ret)
return ret;
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