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serial: max310x: use a separate regmap for each port
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The driver currently does manual register manipulation in
multiple places to talk to a specific UART port.

In order to talk to a specific UART port over SPI, the bits U1
and U0 of the register address can be set, as explained in the
Command byte configuration section of the datasheet.

Make this more elegant by creating regmaps for each UART port
and setting the read_flag_mask and write_flag_mask
accordingly.

All communcations regarding global registers are done on UART
port 0, so replace the global regmap entirely with the port 0
regmap.

Also, remove the 0x1f masks from reg_writeable(), reg_volatile()
and reg_precious() methods, since setting the U1 and U0 bits of
the register address happens inside the regmap core now.

Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Cosmin Tanislav <cosmin.tanislav@analog.com>
Link: https://lore.kernel.org/r/20220605144659.4169853-3-demonsingur@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Cosmin Tanislav authored and Greg Kroah-Hartman committed Jun 10, 2022
1 parent 285e76f commit 6ef281d
Showing 1 changed file with 36 additions and 32 deletions.
68 changes: 36 additions & 32 deletions drivers/tty/serial/max310x.c
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Original file line number Diff line number Diff line change
Expand Up @@ -258,6 +258,7 @@ struct max310x_one {
struct work_struct tx_work;
struct work_struct md_work;
struct work_struct rs_work;
struct regmap *regmap;

u8 rx_buf[MAX310X_FIFO_SIZE];
};
Expand Down Expand Up @@ -287,26 +288,26 @@ static DECLARE_BITMAP(max310x_lines, MAX310X_UART_NRMAX);

static u8 max310x_port_read(struct uart_port *port, u8 reg)
{
struct max310x_port *s = dev_get_drvdata(port->dev);
struct max310x_one *one = to_max310x_port(port);
unsigned int val = 0;

regmap_read(s->regmap, port->iobase + reg, &val);
regmap_read(one->regmap, reg, &val);

return val;
}

static void max310x_port_write(struct uart_port *port, u8 reg, u8 val)
{
struct max310x_port *s = dev_get_drvdata(port->dev);
struct max310x_one *one = to_max310x_port(port);

regmap_write(s->regmap, port->iobase + reg, val);
regmap_write(one->regmap, reg, val);
}

static void max310x_port_update(struct uart_port *port, u8 reg, u8 mask, u8 val)
{
struct max310x_port *s = dev_get_drvdata(port->dev);
struct max310x_one *one = to_max310x_port(port);

regmap_update_bits(s->regmap, port->iobase + reg, mask, val);
regmap_update_bits(one->regmap, reg, mask, val);
}

static int max3107_detect(struct device *dev)
Expand Down Expand Up @@ -445,7 +446,7 @@ static const struct max310x_devtype max14830_devtype = {

static bool max310x_reg_writeable(struct device *dev, unsigned int reg)
{
switch (reg & 0x1f) {
switch (reg) {
case MAX310X_IRQSTS_REG:
case MAX310X_LSR_IRQSTS_REG:
case MAX310X_SPCHR_IRQSTS_REG:
Expand All @@ -462,7 +463,7 @@ static bool max310x_reg_writeable(struct device *dev, unsigned int reg)

static bool max310x_reg_volatile(struct device *dev, unsigned int reg)
{
switch (reg & 0x1f) {
switch (reg) {
case MAX310X_RHR_REG:
case MAX310X_IRQSTS_REG:
case MAX310X_LSR_IRQSTS_REG:
Expand All @@ -484,7 +485,7 @@ static bool max310x_reg_volatile(struct device *dev, unsigned int reg)

static bool max310x_reg_precious(struct device *dev, unsigned int reg)
{
switch (reg & 0x1f) {
switch (reg) {
case MAX310X_RHR_REG:
case MAX310X_IRQSTS_REG:
case MAX310X_SPCHR_IRQSTS_REG:
Expand Down Expand Up @@ -621,18 +622,16 @@ static u32 max310x_set_ref_clk(struct device *dev, struct max310x_port *s,

static void max310x_batch_write(struct uart_port *port, u8 *txbuf, unsigned int len)
{
struct max310x_port *s = dev_get_drvdata(port->dev);
u8 reg = port->iobase + MAX310X_THR_REG;
struct max310x_one *one = to_max310x_port(port);

regmap_raw_write(s->regmap, reg, txbuf, len);
regmap_raw_write(one->regmap, MAX310X_THR_REG, txbuf, len);
}

static void max310x_batch_read(struct uart_port *port, u8 *rxbuf, unsigned int len)
{
struct max310x_port *s = dev_get_drvdata(port->dev);
u8 reg = port->iobase + MAX310X_RHR_REG;
struct max310x_one *one = to_max310x_port(port);

regmap_raw_read(s->regmap, reg, rxbuf, len);
regmap_raw_read(one->regmap, MAX310X_RHR_REG, rxbuf, len);
}

static void max310x_handle_rx(struct uart_port *port, unsigned int rxlen)
Expand Down Expand Up @@ -1234,15 +1233,16 @@ static int max310x_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
#endif

static int max310x_probe(struct device *dev, const struct max310x_devtype *devtype,
struct regmap *regmap, int irq)
struct regmap *regmaps[], int irq)
{
int i, ret, fmin, fmax, freq;
struct max310x_port *s;
u32 uartclk = 0;
bool xtal;

if (IS_ERR(regmap))
return PTR_ERR(regmap);
for (i = 0; i < devtype->nr; i++)
if (IS_ERR(regmaps[i]))
return PTR_ERR(regmaps[i]);

/* Alloc port structure */
s = devm_kzalloc(dev, struct_size(s, p, devtype->nr), GFP_KERNEL);
Expand Down Expand Up @@ -1289,7 +1289,7 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty
goto out_clk;
}

s->regmap = regmap;
s->regmap = regmaps[0];
s->devtype = devtype;
dev_set_drvdata(dev, s);

Expand All @@ -1299,22 +1299,18 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty
goto out_clk;

for (i = 0; i < devtype->nr; i++) {
unsigned int offs = i << 5;

/* Reset port */
regmap_write(s->regmap, MAX310X_MODE2_REG + offs,
regmap_write(regmaps[i], MAX310X_MODE2_REG,
MAX310X_MODE2_RST_BIT);
/* Clear port reset */
regmap_write(s->regmap, MAX310X_MODE2_REG + offs, 0);
regmap_write(regmaps[i], MAX310X_MODE2_REG, 0);

/* Wait for port startup */
do {
regmap_read(s->regmap,
MAX310X_BRGDIVLSB_REG + offs, &ret);
regmap_read(regmaps[i], MAX310X_BRGDIVLSB_REG, &ret);
} while (ret != 0x01);

regmap_write(s->regmap, MAX310X_MODE1_REG + offs,
devtype->mode1);
regmap_write(regmaps[i], MAX310X_MODE1_REG, devtype->mode1);
}

uartclk = max310x_set_ref_clk(dev, s, freq, xtal);
Expand All @@ -1337,11 +1333,13 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty
s->p[i].port.fifosize = MAX310X_FIFO_SIZE;
s->p[i].port.flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY;
s->p[i].port.iotype = UPIO_PORT;
s->p[i].port.iobase = i * 0x20;
s->p[i].port.iobase = i;
s->p[i].port.membase = (void __iomem *)~0;
s->p[i].port.uartclk = uartclk;
s->p[i].port.rs485_config = max310x_rs485_config;
s->p[i].port.ops = &max310x_ops;
s->p[i].regmap = regmaps[i];

/* Disable all interrupts */
max310x_port_write(&s->p[i].port, MAX310X_IRQEN_REG, 0);
/* Clear IRQ status register */
Expand Down Expand Up @@ -1436,6 +1434,7 @@ static struct regmap_config regcfg = {
.val_bits = 8,
.write_flag_mask = MAX310X_WRITE_BIT,
.cache_type = REGCACHE_RBTREE,
.max_register = MAX310X_REG_1F,
.writeable_reg = max310x_reg_writeable,
.volatile_reg = max310x_reg_volatile,
.precious_reg = max310x_reg_precious,
Expand All @@ -1445,7 +1444,8 @@ static struct regmap_config regcfg = {
static int max310x_spi_probe(struct spi_device *spi)
{
const struct max310x_devtype *devtype;
struct regmap *regmap;
struct regmap *regmaps[4];
unsigned int i;
int ret;

/* Setup SPI bus */
Expand All @@ -1460,10 +1460,14 @@ static int max310x_spi_probe(struct spi_device *spi)
if (!devtype)
devtype = (struct max310x_devtype *)spi_get_device_id(spi)->driver_data;

regcfg.max_register = devtype->nr * 0x20 - 1;
regmap = devm_regmap_init_spi(spi, &regcfg);
for (i = 0; i < devtype->nr; i++) {
u8 port_mask = i * 0x20;
regcfg.read_flag_mask = port_mask;
regcfg.write_flag_mask = port_mask | MAX310X_WRITE_BIT;
regmaps[i] = devm_regmap_init_spi(spi, &regcfg);
}

return max310x_probe(&spi->dev, devtype, regmap, spi->irq);
return max310x_probe(&spi->dev, devtype, regmaps, spi->irq);
}

static void max310x_spi_remove(struct spi_device *spi)
Expand Down

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