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ASoC: cs35l56: Use regmap_read_bypassed() to wake the device
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Now that regmap_read_bypassed() has been added to the kernel it is
preferable to wake the device with a read rather than a write as the
utility function can be called at a time before the device has been
identified.

Signed-off-by: Simon Trimmer <simont@opensource.cirrus.com>
Link: https://patch.msgid.link/20240807142715.47077-1-simont@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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Simon Trimmer authored and Mark Brown committed Aug 8, 2024
1 parent 1a4f796 commit 7063a71
Showing 1 changed file with 5 additions and 14 deletions.
19 changes: 5 additions & 14 deletions sound/soc/codecs/cs35l56-shared.c
Original file line number Diff line number Diff line change
Expand Up @@ -450,32 +450,23 @@ static const struct reg_sequence cs35l56_hibernate_seq[] = {
REG_SEQ0(CS35L56_DSP_VIRTUAL1_MBOX_1, CS35L56_MBOX_CMD_ALLOW_AUTO_HIBERNATE),
};

static const struct reg_sequence cs35l56_hibernate_wake_seq[] = {
REG_SEQ0(CS35L56_DSP_VIRTUAL1_MBOX_1, CS35L56_MBOX_CMD_WAKEUP),
};

static void cs35l56_issue_wake_event(struct cs35l56_base *cs35l56_base)
{
unsigned int val;

/*
* Dummy transactions to trigger I2C/SPI auto-wake. Issue two
* transactions to meet the minimum required time from the rising edge
* to the last falling edge of wake.
*
* It uses bypassed write because we must wake the chip before
* It uses bypassed read because we must wake the chip before
* disabling regmap cache-only.
*
* This can NAK on I2C which will terminate the write sequence so the
* single-write sequence is issued twice.
*/
regmap_multi_reg_write_bypassed(cs35l56_base->regmap,
cs35l56_hibernate_wake_seq,
ARRAY_SIZE(cs35l56_hibernate_wake_seq));
regmap_read_bypassed(cs35l56_base->regmap, CS35L56_IRQ1_STATUS, &val);

usleep_range(CS35L56_WAKE_HOLD_TIME_US, 2 * CS35L56_WAKE_HOLD_TIME_US);

regmap_multi_reg_write_bypassed(cs35l56_base->regmap,
cs35l56_hibernate_wake_seq,
ARRAY_SIZE(cs35l56_hibernate_wake_seq));
regmap_read_bypassed(cs35l56_base->regmap, CS35L56_IRQ1_STATUS, &val);

cs35l56_wait_control_port_ready();
}
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