Merge master.kernel.org:/home/rmk/linux-2.6-arm

* master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: Use a definition for the userspace cmpxchg emulation syscall
  [ARM] Fix test for unimplemented ARM syscalls
  ARM: 5784/1: fix early boot machine ID mismatch error display
  [ARM] orion5x: update defconfig
  [ARM] Kirkwood: update defconfig
  [ARM] Kirkwood: clarify PCIe MEM bus/physical address distinction
  [ARM] kirkwood: fix PCI I/O port assignment
  [ARM] kirkwood: fix section mismatch
  [ARM] OpenRD base: Initialize PCI express and i2c
  [ARM] properly report mv78100 stepping A1
  ARM: 5780/1: KS8695: Fix macro definition bug in regs-switch.c
  ARM: 5779/1: ep93xx/micro9.c: fix implicit declaration of function __raw_readl and IOMEM
  RealView: Add sparsemem support for the RealView PBX platform
  RealView: Remove duplicated #define REALVIEW_SYS_FLAGS* statements
  RealView: Add default memory configuration
  Check whether the SCU was already initialised
  ARMv7: Check whether the SMP/nAMP mode was already enabled
  [ARM] pxa: fix resume failure by saving/restoring IPRx registers
  [ARM] pxa/palm: fix incorrect initialization of Palm Tungsten C keyboard
  [ARM] pxa/zaurus: fix NAND flash OOB layout for Borzoi

arch/arm/include/asm/unistd.h

@@ -402,6 +402,15 @@
 #define __ARM_NR_usr32			(__ARM_NR_BASE+4)
 #define __ARM_NR_set_tls		(__ARM_NR_BASE+5)
 
+/*
+ * *NOTE*: This is a ghost syscall private to the kernel.  Only the
+ * __kuser_cmpxchg code in entry-armv.S should be aware of its
+ * existence.  Don't ever use this from user code.
+ */
+#ifdef __KERNEL__
+#define __ARM_NR_cmpxchg		(__ARM_NR_BASE+0x00fff0)
+#endif
+
 /*
  * The following syscalls are obsolete and no longer available for EABI.
  */

arch/arm/kernel/entry-armv.S

@@ -21,6 +21,7 @@
 #include <mach/entry-macro.S>
 #include <asm/thread_notify.h>
 #include <asm/unwind.h>
+#include <asm/unistd.h>
 
 #include "entry-header.S"
 
@@ -908,10 +909,10 @@ __kuser_cmpxchg:				@ 0xffff0fc0
 	 * A special ghost syscall is used for that (see traps.c).
 	 */
 	stmfd	sp!, {r7, lr}
-	mov	r7, #0xff00		@ 0xfff0 into r7 for EABI
-	orr	r7, r7, #0xf0
-	swi	#0x9ffff0
+	ldr	r7, =1f			@ it's 20 bits
+	swi	__ARM_NR_cmpxchg
 	ldmfd	sp!, {r7, pc}
+1:	.word	__ARM_NR_cmpxchg
 
 #elif __LINUX_ARM_ARCH__ < 6
 

arch/arm/kernel/head-common.S

@@ -97,7 +97,7 @@ __error_a:
 	bl	printhex8
 	adr	r0, str_a2
 	bl	printascii
-	adr	r3, 3f
+	adr	r3, 4f
 	ldmia	r3, {r4, r5, r6}		@ get machine desc list
 	sub	r4, r3, r4			@ get offset between virt&phys
 	add	r5, r5, r4			@ convert virt addresses to

arch/arm/kernel/smp_scu.c

@@ -37,6 +37,10 @@ void __init scu_enable(void __iomem *scu_base)
 	u32 scu_ctrl;
 
 	scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
+	/* already enabled? */
+	if (scu_ctrl & 1)
+		return;
+
 	scu_ctrl |= 1;
 	__raw_writel(scu_ctrl, scu_base + SCU_CTRL);
 

arch/arm/kernel/traps.c

@@ -528,7 +528,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
 	 * __kuser_cmpxchg code in entry-armv.S should be aware of its
 	 * existence.  Don't ever use this from user code.
 	 */
-	case 0xfff0:
+	case NR(cmpxchg):
 	for (;;) {
 		extern void do_DataAbort(unsigned long addr, unsigned int fsr,
 					 struct pt_regs *regs);
@@ -573,7 +573,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
 		   if not implemented, rather than raising SIGILL.  This
 		   way the calling program can gracefully determine whether
 		   a feature is supported.  */
-		if (no <= 0x7ff)
+		if ((no & 0xffff) <= 0x7ff)
 			return -ENOSYS;
 		break;
 	}

arch/arm/mach-ep93xx/micro9.c

@@ -15,6 +15,7 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/mtd/physmap.h>
+#include <linux/io.h>
 
 #include <mach/hardware.h>
 

arch/arm/mach-kirkwood/addr-map.c

@@ -105,7 +105,7 @@ void __init kirkwood_setup_cpu_mbus(void)
 	setup_cpu_win(0, KIRKWOOD_PCIE_IO_PHYS_BASE, KIRKWOOD_PCIE_IO_SIZE,
 		      TARGET_PCIE, ATTR_PCIE_IO, KIRKWOOD_PCIE_IO_BUS_BASE);
 	setup_cpu_win(1, KIRKWOOD_PCIE_MEM_PHYS_BASE, KIRKWOOD_PCIE_MEM_SIZE,
-		      TARGET_PCIE, ATTR_PCIE_MEM, -1);
+		      TARGET_PCIE, ATTR_PCIE_MEM, KIRKWOOD_PCIE_MEM_BUS_BASE);
 
 	/*
 	 * Setup window for NAND controller.

arch/arm/mach-kirkwood/common.c

@@ -845,7 +845,7 @@ int __init kirkwood_find_tclk(void)
 	return 166666667;
 }
 
-static void kirkwood_timer_init(void)
+static void __init kirkwood_timer_init(void)
 {
 	kirkwood_tclk = kirkwood_find_tclk();
 	orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);

arch/arm/mach-kirkwood/include/mach/io.h

@@ -15,7 +15,7 @@
 
 static inline void __iomem *__io(unsigned long addr)
 {
-	return (void __iomem *)((addr - KIRKWOOD_PCIE_IO_PHYS_BASE)
+	return (void __iomem *)((addr - KIRKWOOD_PCIE_IO_BUS_BASE)
 					+ KIRKWOOD_PCIE_IO_VIRT_BASE);
 }
 

arch/arm/mach-kirkwood/include/mach/kirkwood.h

@@ -43,6 +43,7 @@
 #define KIRKWOOD_REGS_SIZE		SZ_1M
 
 #define KIRKWOOD_PCIE_MEM_PHYS_BASE	0xe0000000
+#define KIRKWOOD_PCIE_MEM_BUS_BASE	0xe0000000
 #define KIRKWOOD_PCIE_MEM_SIZE		SZ_128M
 
 /*

arch/arm/mach-kirkwood/openrd_base-setup.c

@@ -70,8 +70,20 @@ static void __init openrd_base_init(void)
 	kirkwood_ge00_init(&openrd_base_ge00_data);
 	kirkwood_sata_init(&openrd_base_sata_data);
 	kirkwood_sdio_init(&openrd_base_mvsdio_data);
+
+	kirkwood_i2c_init();
 }
 
+static int __init openrd_base_pci_init(void)
+{
+	if (machine_is_openrd_base())
+		kirkwood_pcie_init();
+
+	return 0;
+ }
+subsys_initcall(openrd_base_pci_init);
+
+
 MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board")
 	/* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */
 	.phys_io	= KIRKWOOD_REGS_PHYS_BASE,

arch/arm/mach-kirkwood/pcie.c

@@ -93,7 +93,7 @@ static struct pci_ops pcie_ops = {
 };
 
 
-static int kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
+static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
 {
 	struct resource *res;
 	extern unsigned int kirkwood_clk_ctrl;
@@ -115,7 +115,7 @@ static int kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
 	 */
 	res[0].name = "PCIe I/O Space";
 	res[0].flags = IORESOURCE_IO;
-	res[0].start = KIRKWOOD_PCIE_IO_PHYS_BASE;
+	res[0].start = KIRKWOOD_PCIE_IO_BUS_BASE;
 	res[0].end = res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1;
 	if (request_resource(&ioport_resource, &res[0]))
 		panic("Request PCIe IO resource failed\n");
@@ -126,7 +126,7 @@ static int kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
 	 */
 	res[1].name = "PCIe Memory Space";
 	res[1].flags = IORESOURCE_MEM;
-	res[1].start = KIRKWOOD_PCIE_MEM_PHYS_BASE;
+	res[1].start = KIRKWOOD_PCIE_MEM_BUS_BASE;
 	res[1].end = res[1].start + KIRKWOOD_PCIE_MEM_SIZE - 1;
 	if (request_resource(&iomem_resource, &res[1]))
 		panic("Request PCIe Memory resource failed\n");

arch/arm/mach-ks8695/include/mach/regs-switch.h

@@ -25,7 +25,7 @@
 #define KS8695_SEC1		(0x04)		/* Switch Engine Control 1 */
 #define KS8695_SEC2		(0x08)		/* Switch Engine Control 2 */
 
-#define KS8695_P(x)_C(z)	(0xc0 + (((x)-1)*3 + ((z)-1))*4)	/* Port Configuration Registers */
+#define KS8695_SEPXCZ(x,z)	(0x0c + (((x)-1)*3 + ((z)-1))*4)	/* Port Configuration Registers */
 
 #define KS8695_SEP12AN		(0x48)		/* Port 1 & 2 Auto-Negotiation */
 #define KS8695_SEP34AN		(0x4c)		/* Port 3 & 4 Auto-Negotiation */

arch/arm/mach-mv78xx0/common.c

@@ -845,6 +845,8 @@ static char * __init mv78xx0_id(void)
 	} else if (dev == MV78100_DEV_ID) {
 		if (rev == MV78100_REV_A0)
 			return "MV78100-A0";
+		else if (rev == MV78100_REV_A1)
+			return "MV78100-A1";
 		else
 			return "MV78100-Rev-Unsupported";
 	} else if (dev == MV78200_DEV_ID) {

arch/arm/mach-mv78xx0/include/mach/mv78xx0.h

@@ -112,6 +112,7 @@
 
 #define MV78100_DEV_ID		0x7810
 #define MV78100_REV_A0		1
+#define MV78100_REV_A1		2
 
 #define MV78200_DEV_ID		0x7820
 #define MV78200_REV_A0		1

arch/arm/mach-pxa/irq.c

@@ -25,6 +25,8 @@
 
 #include "generic.h"
 
+#define MAX_INTERNAL_IRQS	128
+
 #define IRQ_BIT(n)	(((n) - PXA_IRQ(0)) & 0x1f)
 #define _ICMR(n)	(*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICMR2 : &ICMR))
 #define _ICLR(n)	(*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICLR2 : &ICLR))
@@ -122,6 +124,8 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
 {
 	int irq, i;
 
+	BUG_ON(irq_nr > MAX_INTERNAL_IRQS);
+
 	pxa_internal_irq_nr = irq_nr;
 
 	for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq += 32) {
@@ -149,7 +153,8 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
 }
 
 #ifdef CONFIG_PM
-static unsigned long saved_icmr[2];
+static unsigned long saved_icmr[MAX_INTERNAL_IRQS/32];
+static unsigned long saved_ipr[MAX_INTERNAL_IRQS];
 
 static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state)
 {
@@ -159,6 +164,8 @@ static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state)
 		saved_icmr[i] = _ICMR(irq);
 		_ICMR(irq) = 0;
 	}
+	for (i = 0; i < pxa_internal_irq_nr; i++)
+		saved_ipr[i] = IPR(i);
 
 	return 0;
 }
@@ -171,6 +178,8 @@ static int pxa_irq_resume(struct sys_device *dev)
 		_ICMR(irq) = saved_icmr[i];
 		_ICLR(irq) = 0;
 	}
+	for (i = 0; i < pxa_internal_irq_nr; i++)
+		IPR(i) = saved_ipr[i];
 
 	ICCR = 1;
 	return 0;

arch/arm/mach-pxa/palmtc.c

@@ -292,10 +292,10 @@ const static unsigned int palmtc_keypad_col_gpios[] = {
 
 static struct matrix_keypad_platform_data palmtc_keypad_platform_data = {
 	.keymap_data	= &palmtc_keymap_data,
-	.col_gpios	= palmtc_keypad_row_gpios,
-	.num_col_gpios	= 12,
-	.row_gpios	= palmtc_keypad_col_gpios,
-	.num_row_gpios	= 4,
+	.row_gpios	= palmtc_keypad_row_gpios,
+	.num_row_gpios	= ARRAY_SIZE(palmtc_keypad_row_gpios),
+	.col_gpios	= palmtc_keypad_col_gpios,
+	.num_col_gpios	= ARRAY_SIZE(palmtc_keypad_col_gpios),
 	.active_low	= 1,
 
 	.debounce_ms		= 20,

arch/arm/mach-pxa/spitz.c

@@ -779,11 +779,34 @@ static void __init common_init(void)
 	pxa_set_i2c_info(NULL);
 }
 
+#if defined(CONFIG_MACH_AKITA) || defined(CONFIG_MACH_BORZOI)
+static struct nand_bbt_descr sharpsl_akita_bbt = {
+	.options = 0,
+	.offs = 4,
+	.len = 1,
+	.pattern = scan_ff_pattern
+};
+
+static struct nand_ecclayout akita_oobinfo = {
+	.eccbytes = 24,
+	.eccpos = {
+		   0x5, 0x1, 0x2, 0x3, 0x6, 0x7, 0x15, 0x11,
+		   0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23,
+		   0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37},
+	.oobfree = {{0x08, 0x09}}
+};
+#endif
+
 #if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI)
 static void __init spitz_init(void)
 {
 	spitz_ficp_platform_data.gpio_pwdown = SPITZ_GPIO_IR_ON;
 
+	if (machine_is_borzoi()) {
+		sharpsl_nand_platform_data.badblock_pattern = &sharpsl_akita_bbt;
+		sharpsl_nand_platform_data.ecc_layout = &akita_oobinfo;
+	}
+
 	platform_scoop_config = &spitz_pcmcia_config;
 
 	common_init();
@@ -808,22 +831,6 @@ static struct i2c_board_info akita_i2c_board_info[] = {
 	},
 };
 
-static struct nand_bbt_descr sharpsl_akita_bbt = {
-	.options = 0,
-	.offs = 4,
-	.len = 1,
-	.pattern = scan_ff_pattern
-};
-
-static struct nand_ecclayout akita_oobinfo = {
-	.eccbytes = 24,
-	.eccpos = {
-		   0x5, 0x1, 0x2, 0x3, 0x6, 0x7, 0x15, 0x11,
-		   0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23,
-		   0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37},
-	.oobfree = {{0x08, 0x09}}
-};
-
 static void __init akita_init(void)
 {
 	spitz_ficp_platform_data.gpio_pwdown = AKITA_GPIO_IR_ON;

arch/arm/mach-realview/Kconfig

@@ -70,6 +70,8 @@ config MACH_REALVIEW_PBX
 	bool "Support RealView/PBX platform"
 	select ARM_GIC
 	select HAVE_PATA_PLATFORM
+	select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !HIGH_PHYS_OFFSET
+	select ZONE_DMA if SPARSEMEM
 	help
 	  Include support for the ARM(R) RealView PBX platform.
 
@@ -82,6 +84,7 @@ config REALVIEW_HIGH_PHYS_OFFSET
 	  0x70000000, 256MB of which being mirrored at 0x00000000. If
 	  the board supports 512MB of RAM, this option allows the
 	  memory to be accessed contiguously at the high physical
-	  offset.
+	  offset. On the PBX board, disabling this option allows 1GB of
+	  RAM to be used with SPARSEMEM.
 
 endmenu

arch/arm/mach-realview/core.c

@@ -59,6 +59,25 @@
 /* used by entry-macro.S and platsmp.c */
 void __iomem *gic_cpu_base_addr;
 
+#ifdef CONFIG_ZONE_DMA
+/*
+ * Adjust the zones if there are restrictions for DMA access.
+ */
+void __init realview_adjust_zones(int node, unsigned long *size,
+				  unsigned long *hole)
+{
+	unsigned long dma_size = SZ_256M >> PAGE_SHIFT;
+
+	if (!machine_is_realview_pbx() || node || (size[0] <= dma_size))
+		return;
+
+	size[ZONE_NORMAL] = size[0] - dma_size;
+	size[ZONE_DMA] = dma_size;
+	hole[ZONE_NORMAL] = hole[0];
+	hole[ZONE_DMA] = 0;
+}
+#endif
+
 /*
  * This is the RealView sched_clock implementation.  This has
  * a resolution of 41.7ns, and a maximum value of about 179s.
@@ -543,7 +562,7 @@ static int realview_clcd_setup(struct clcd_fb *fb)
 	fb->panel		= realview_clcd_panel();
 
 	fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
-						    &dma, GFP_KERNEL);
+						    &dma, GFP_KERNEL | GFP_DMA);
 	if (!fb->fb.screen_base) {
 		printk(KERN_ERR "CLCD: unable to map framebuffer\n");
 		return -ENOMEM;
@@ -788,3 +807,24 @@ void __init realview_timer_init(unsigned int timer_irq)
 	realview_clocksource_init();
 	realview_clockevents_init(timer_irq);
 }
+
+/*
+ * Setup the memory banks.
+ */
+void realview_fixup(struct machine_desc *mdesc, struct tag *tags, char **from,
+		    struct meminfo *meminfo)
+{
+	/*
+	 * Most RealView platforms have 512MB contiguous RAM at 0x70000000.
+	 * Half of this is mirrored at 0.
+	 */
+#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
+	meminfo->bank[0].start = 0x70000000;
+	meminfo->bank[0].size = SZ_512M;
+	meminfo->nr_banks = 1;
+#else
+	meminfo->bank[0].start = 0;
+	meminfo->bank[0].size = SZ_256M;
+	meminfo->nr_banks = 1;
+#endif
+}