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bnx2x: correct LPI pass-through configuration
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Commit c8c60d8 contained
an incorrect logic which enabled a buffer overflow when accessing
an array during LPI pass-through configuration.
This patch fixes this issue by removing that logic altogether.

Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Yaniv Rosner <yaniv.rosner@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Yuval Mintz authored and David S. Miller committed Jun 17, 2012
1 parent 260762c commit 79504d7
Showing 1 changed file with 6 additions and 12 deletions.
18 changes: 6 additions & 12 deletions drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
Original file line number Diff line number Diff line change
Expand Up @@ -4057,18 +4057,12 @@ static void bnx2x_warpcore_set_10G_XFI(struct bnx2x_phy *phy,
MDIO_WC_REG_DIGITAL4_MISC3, val | 0x8080);

/* Enable LPI pass through */
if ((params->eee_mode & EEE_MODE_ADV_LPI) &&
(phy->flags & FLAGS_EEE_10GBT) &&
(!(params->eee_mode & EEE_MODE_ENABLE_LPI) ||
bnx2x_eee_calc_timer(params)) &&
(params->req_duplex[bnx2x_phy_selection(params)] == DUPLEX_FULL)) {
DP(NETIF_MSG_LINK, "Configure WC for LPI pass through\n");
bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD,
MDIO_WC_REG_EEE_COMBO_CONTROL0,
0x7c);
bnx2x_cl45_read_or_write(bp, phy, MDIO_WC_DEVAD,
MDIO_WC_REG_DIGITAL4_MISC5, 0xc000);
}
DP(NETIF_MSG_LINK, "Configure WC for LPI pass through\n");
bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD,
MDIO_WC_REG_EEE_COMBO_CONTROL0,
0x7c);
bnx2x_cl45_read_or_write(bp, phy, MDIO_WC_DEVAD,
MDIO_WC_REG_DIGITAL4_MISC5, 0xc000);

/* 10G XFI Full Duplex */
bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD,
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