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ARM: pxa: reduce the scope of get_memclk_frequency_10khz()
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Up to now, only pxa2xx pcmcia driver is using the API. No other device driver
is using this API in PXA3xx or any other PXA silicons.

Restrict the scope only on pxa2xx and remove the implementation of pxa3xx. So
we can avoid oo much checking on cpuid after more pxa chips supported.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Cc: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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Haojian Zhuang authored and Eric Miao committed Oct 9, 2010
1 parent ecf89b8 commit 799929d
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Showing 3 changed files with 1 addition and 21 deletions.
3 changes: 1 addition & 2 deletions arch/arm/mach-pxa/generic.c
Original file line number Diff line number Diff line change
Expand Up @@ -79,8 +79,7 @@ unsigned int get_memclk_frequency_10khz(void)
return pxa25x_get_memclk_frequency_10khz();
else if (cpu_is_pxa27x())
return pxa27x_get_memclk_frequency_10khz();
else
return pxa3xx_get_memclk_frequency_10khz();
return 0;
}
EXPORT_SYMBOL(get_memclk_frequency_10khz);

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2 changes: 0 additions & 2 deletions arch/arm/mach-pxa/generic.h
Original file line number Diff line number Diff line change
Expand Up @@ -54,11 +54,9 @@ static inline void pxa2xx_clear_reset_status(unsigned int mask) {}

#ifdef CONFIG_PXA3xx
extern unsigned pxa3xx_get_clk_frequency_khz(int);
extern unsigned pxa3xx_get_memclk_frequency_10khz(void);
extern void pxa3xx_clear_reset_status(unsigned int);
#else
#define pxa3xx_get_clk_frequency_khz(x) (0)
#define pxa3xx_get_memclk_frequency_10khz() (0)
static inline void pxa3xx_clear_reset_status(unsigned int mask) {}
#endif

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17 changes: 0 additions & 17 deletions arch/arm/mach-pxa/pxa3xx.c
Original file line number Diff line number Diff line change
Expand Up @@ -98,23 +98,6 @@ unsigned int pxa3xx_get_clk_frequency_khz(int info)
return CLK / 1000;
}

/*
* Return the current static memory controller clock frequency
* in units of 10kHz
*/
unsigned int pxa3xx_get_memclk_frequency_10khz(void)
{
unsigned long acsr;
unsigned int smcfs, clk = 0;

acsr = ACSR;

smcfs = (acsr >> 23) & 0x7;
clk = (acsr & ACCR_D0CS) ? RO_CLK : smcfs_mult[smcfs] * BASE_CLK;

return (clk / 10000);
}

void pxa3xx_clear_reset_status(unsigned int mask)
{
/* RESET_STATUS_* has a 1:1 mapping with ARSR */
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