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This adds support for irqtrace for lockdep on ARM. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King
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Russell King
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Sep 20, 2006
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Original file line number | Diff line number | Diff line change |
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#ifndef __ASM_ARM_IRQFLAGS_H | ||
#define __ASM_ARM_IRQFLAGS_H | ||
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#ifdef __KERNEL__ | ||
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#include <asm/ptrace.h> | ||
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/* | ||
* CPU interrupt mask handling. | ||
*/ | ||
#if __LINUX_ARM_ARCH__ >= 6 | ||
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#define raw_local_irq_save(x) \ | ||
({ \ | ||
__asm__ __volatile__( \ | ||
"mrs %0, cpsr @ local_irq_save\n" \ | ||
"cpsid i" \ | ||
: "=r" (x) : : "memory", "cc"); \ | ||
}) | ||
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#define raw_local_irq_enable() __asm__("cpsie i @ __sti" : : : "memory", "cc") | ||
#define raw_local_irq_disable() __asm__("cpsid i @ __cli" : : : "memory", "cc") | ||
#define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc") | ||
#define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc") | ||
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#else | ||
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/* | ||
* Save the current interrupt enable state & disable IRQs | ||
*/ | ||
#define raw_local_irq_save(x) \ | ||
({ \ | ||
unsigned long temp; \ | ||
(void) (&temp == &x); \ | ||
__asm__ __volatile__( \ | ||
"mrs %0, cpsr @ local_irq_save\n" \ | ||
" orr %1, %0, #128\n" \ | ||
" msr cpsr_c, %1" \ | ||
: "=r" (x), "=r" (temp) \ | ||
: \ | ||
: "memory", "cc"); \ | ||
}) | ||
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/* | ||
* Enable IRQs | ||
*/ | ||
#define raw_local_irq_enable() \ | ||
({ \ | ||
unsigned long temp; \ | ||
__asm__ __volatile__( \ | ||
"mrs %0, cpsr @ local_irq_enable\n" \ | ||
" bic %0, %0, #128\n" \ | ||
" msr cpsr_c, %0" \ | ||
: "=r" (temp) \ | ||
: \ | ||
: "memory", "cc"); \ | ||
}) | ||
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/* | ||
* Disable IRQs | ||
*/ | ||
#define raw_local_irq_disable() \ | ||
({ \ | ||
unsigned long temp; \ | ||
__asm__ __volatile__( \ | ||
"mrs %0, cpsr @ local_irq_disable\n" \ | ||
" orr %0, %0, #128\n" \ | ||
" msr cpsr_c, %0" \ | ||
: "=r" (temp) \ | ||
: \ | ||
: "memory", "cc"); \ | ||
}) | ||
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/* | ||
* Enable FIQs | ||
*/ | ||
#define local_fiq_enable() \ | ||
({ \ | ||
unsigned long temp; \ | ||
__asm__ __volatile__( \ | ||
"mrs %0, cpsr @ stf\n" \ | ||
" bic %0, %0, #64\n" \ | ||
" msr cpsr_c, %0" \ | ||
: "=r" (temp) \ | ||
: \ | ||
: "memory", "cc"); \ | ||
}) | ||
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/* | ||
* Disable FIQs | ||
*/ | ||
#define local_fiq_disable() \ | ||
({ \ | ||
unsigned long temp; \ | ||
__asm__ __volatile__( \ | ||
"mrs %0, cpsr @ clf\n" \ | ||
" orr %0, %0, #64\n" \ | ||
" msr cpsr_c, %0" \ | ||
: "=r" (temp) \ | ||
: \ | ||
: "memory", "cc"); \ | ||
}) | ||
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#endif | ||
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/* | ||
* Save the current interrupt enable state. | ||
*/ | ||
#define raw_local_save_flags(x) \ | ||
({ \ | ||
__asm__ __volatile__( \ | ||
"mrs %0, cpsr @ local_save_flags" \ | ||
: "=r" (x) : : "memory", "cc"); \ | ||
}) | ||
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/* | ||
* restore saved IRQ & FIQ state | ||
*/ | ||
#define raw_local_irq_restore(x) \ | ||
__asm__ __volatile__( \ | ||
"msr cpsr_c, %0 @ local_irq_restore\n" \ | ||
: \ | ||
: "r" (x) \ | ||
: "memory", "cc") | ||
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#define raw_irqs_disabled_flags(flags) \ | ||
({ \ | ||
(int)((flags) & PSR_I_BIT); \ | ||
}) | ||
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#endif | ||
#endif |
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