drm/amd/display: Add DCN3 chip ids

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
mariux64 · Jul 1, 2020 · 7c40270 · 7c40270
1 parent 2c6e83a
commit 7c40270
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diff --git a/drivers/gpu/drm/amd/display/include/dal_asic_id.h b/drivers/gpu/drm/amd/display/include/dal_asic_id.h
@@ -166,13 +166,17 @@ enum {
 	NV_NAVI10_P_A0      = 1,
 	NV_NAVI12_P_A0      = 10,
 	NV_NAVI14_M_A0      = 20,
+	NV_SIENNA_CICHLID_P_A0      = 40,
 	NV_UNKNOWN          = 0xFF
 };
 
 #define ASICREV_IS_NAVI10_P(eChipRev)        (eChipRev < NV_NAVI12_P_A0)
 #define ASICREV_IS_NAVI12_P(eChipRev)        ((eChipRev >= NV_NAVI12_P_A0) && (eChipRev < NV_NAVI14_M_A0))
 #define ASICREV_IS_NAVI14_M(eChipRev)        ((eChipRev >= NV_NAVI14_M_A0) && (eChipRev < NV_UNKNOWN))
 #define ASICREV_IS_RENOIR(eChipRev) ((eChipRev >= RENOIR_A0) && (eChipRev < RAVEN1_F0))
+#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
+#define ASICREV_IS_SIENNA_CICHLID_P(eChipRev)        ((eChipRev >= NV_SIENNA_CICHLID_P_A0))
+#endif
 
 /*
  * ASIC chip ID

diff --git a/drivers/gpu/drm/amd/display/include/dal_types.h b/drivers/gpu/drm/amd/display/include/dal_types.h
@@ -48,6 +48,7 @@ enum dce_version {
 	DCN_VERSION_1_01,
 	DCN_VERSION_2_0,
 	DCN_VERSION_2_1,
+	DCN_VERSION_3_0,
 	DCN_VERSION_MAX
 };