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usb: dwc3: core: Only handle soft-reset in DCTL
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commit f4fd84a upstream.

Make sure not to set run_stop bit or link state change request while
initiating soft-reset. Register read-modify-write operation may
unintentionally start the controller before the initialization completes
with its previous DCTL value, which can cause initialization failure.

Fixes: f59dcab ("usb: dwc3: core: improve reset sequence")
Cc: <stable@vger.kernel.org>
Signed-off-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
Link: https://lore.kernel.org/r/6aecbd78328f102003d40ccf18ceeebd411d3703.1650594792.git.Thinh.Nguyen@synopsys.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Thinh Nguyen authored and Greg Kroah-Hartman committed May 9, 2022
1 parent 5d8299e commit 7d14c96
Showing 1 changed file with 2 additions and 1 deletion.
3 changes: 2 additions & 1 deletion drivers/usb/dwc3/core.c
Original file line number Diff line number Diff line change
Expand Up @@ -275,7 +275,8 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc)

reg = dwc3_readl(dwc->regs, DWC3_DCTL);
reg |= DWC3_DCTL_CSFTRST;
dwc3_writel(dwc->regs, DWC3_DCTL, reg);
reg &= ~DWC3_DCTL_RUN_STOP;
dwc3_gadget_dctl_write_safe(dwc, reg);

/*
* For DWC_usb31 controller 1.90a and later, the DCTL.CSFRST bit
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