-
Notifications
You must be signed in to change notification settings - Fork 0
Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
drivers: net: cpsw: add am335x errata workarround for interrutps
As per Am335x Errata [1] Advisory 1.0.9, The CPSW C0_TX_PEND and C0_RX_PEND interrupt outputs provide a single transmit interrupt that combines transmit channel interrupts TXPEND[7:0] and a single receive interrupt that combines receive channel interrupts RXPEND[7:0]. The TXPEND[0] and RXPEND[0] interrupt outputs are connected to the ARM Cortex-A8 interrupt controller (INTC) rather than the C0_TX_PEND and C0_RX_PEND interrupt outputs. So even though CPSW interrupt is cleared by writing appropriate values to EOI register the interrupt is not cleared in IRQ controller. So interrupt is still pending and CPU is struck in ISR, the workaround is to disable the interrupts in ARM irq controller. [1] http://www.ti.com/lit/er/sprz360f/sprz360f.pdf Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
- Loading branch information
Mugunthan V N
authored and
David S. Miller
committed
Aug 13, 2015
1 parent
182ad46
commit 7da1160
Showing
1 changed file
with
77 additions
and
6 deletions.
There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters