Skip to content

Commit

Permalink
ARM: STi: DT: Add STiH407 family mtsin0 pinctrl configuration
Browse files Browse the repository at this point in the history 
mtsin0 channel can only be configured for parallel data transfer.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
  • Loading branch information
Peter Griffin authored and Maxime Coquelin committed Jul 22, 2015
1 parent e0decdd commit 810099f
Showing 1 changed file with 19 additions and 0 deletions.
19 changes: 19 additions & 0 deletions arch/arm/boot/dts/stih407-pinctrl.dtsi
View file
Original file line number Diff line number Diff line change
Expand Up @@ -608,6 +608,25 @@
};
};
};

mtsin0 {
pinctrl_mtsin0_parallel: mtsin0_parallel {
st,pins {
DATA7 = <&pio10 4 ALT3 IN SE_NICLK_IO 0 CLK_A>;
DATA6 = <&pio10 5 ALT3 IN SE_NICLK_IO 0 CLK_A>;
DATA5 = <&pio10 6 ALT3 IN SE_NICLK_IO 0 CLK_A>;
DATA4 = <&pio10 7 ALT3 IN SE_NICLK_IO 0 CLK_A>;
DATA3 = <&pio11 0 ALT3 IN SE_NICLK_IO 0 CLK_A>;
DATA2 = <&pio11 1 ALT3 IN SE_NICLK_IO 0 CLK_A>;
DATA1 = <&pio11 2 ALT3 IN SE_NICLK_IO 0 CLK_A>;
DATA0 = <&pio11 3 ALT3 IN SE_NICLK_IO 0 CLK_A>;
CLKIN = <&pio10 3 ALT3 IN CLKNOTDATA 0 CLK_A>;
VALID = <&pio10 1 ALT3 IN SE_NICLK_IO 0 CLK_A>;
ERROR = <&pio10 0 ALT3 IN SE_NICLK_IO 0 CLK_A>;
PKCLK = <&pio10 2 ALT3 IN SE_NICLK_IO 0 CLK_A>;
};
};
};
};

pin-controller-front1 {
Expand Down

0 comments on commit 810099f

Please sign in to comment.