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OMAP3: add comments for low power code errata
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Errata covered:
- 1.157 & 1.185
- i443
- i581

Tested on N900 and Beagleboard with full RET and OFF modes,
using cpuidle and suspend.

Signed-off-by: Jean Pihet <j-pihet@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Jean Pihet authored and Kevin Hilman committed Dec 21, 2010
1 parent f7dfe3d commit 8352129
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Showing 2 changed files with 13 additions and 2 deletions.
4 changes: 2 additions & 2 deletions arch/arm/mach-omap2/pm34xx.c
Original file line number Diff line number Diff line change
Expand Up @@ -146,7 +146,7 @@ static void omap3_core_save_context(void)

/*
* Force write last pad into memory, as this can fail in some
* cases according to erratas 1.157, 1.185
* cases according to errata 1.157, 1.185
*/
omap_ctrl_writel(omap_ctrl_readl(OMAP343X_PADCONF_ETK_D14),
OMAP343X_CONTROL_MEM_WKUP + 0x2a0);
Expand Down Expand Up @@ -433,7 +433,7 @@ void omap_sram_idle(void)
/*
* On EMU/HS devices ROM code restores a SRDC value
* from scratchpad which has automatic self refresh on timeout
* of AUTO_CNT = 1 enabled. This takes care of errata 1.142.
* of AUTO_CNT = 1 enabled. This takes care of erratum ID i443.
* Hence store/restore the SDRC_POWER register here.
*/
if (omap_rev() >= OMAP3430_REV_ES3_0 &&
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11 changes: 11 additions & 0 deletions arch/arm/mach-omap2/sleep34xx.S
Original file line number Diff line number Diff line change
Expand Up @@ -596,6 +596,7 @@ usettbr0:
* Internal functions
*/

/* This function implements the erratum ID i443 WA, applies to 34xx >= ES3.0 */
.text
ENTRY(es3_sdrc_fix)
ldr r4, sdrc_syscfg @ get config addr
Expand Down Expand Up @@ -641,6 +642,16 @@ sdrc_manual_1:
ENTRY(es3_sdrc_fix_sz)
.word . - es3_sdrc_fix

/*
* This function implements the erratum ID i581 WA:
* SDRC state restore before accessing the SDRAM
*
* Only used at return from non-OFF mode. For OFF
* mode the ROM code configures the SDRC and
* the DPLL before calling the restore code directly
* from DDR.
*/

/* Make sure SDRC accesses are ok */
wait_sdrc_ok:

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