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drm: Loongson-3 doesn't fully support wc memory
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[ Upstream commit 221004c ]

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: stable@vger.kernel.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Sasha Levin <sasha.levin@oracle.com>
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Huacai Chen authored and Sasha Levin committed May 10, 2016
1 parent ebaea24 commit 837d4fb
Showing 1 changed file with 2 additions and 0 deletions.
2 changes: 2 additions & 0 deletions include/drm/drm_cache.h
Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,8 @@ static inline bool drm_arch_can_wc_memory(void)
{
#if defined(CONFIG_PPC) && !defined(CONFIG_NOT_COHERENT_CACHE)
return false;
#elif defined(CONFIG_MIPS) && defined(CONFIG_CPU_LOONGSON3)
return false;
#else
return true;
#endif
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