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avr32: pm_standby low-power ram bug fix
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The value stored into the SDRAMC LPR register should be the current
value of the register with the Self-refresh value set in the lower bit
field.

The bug involved only the Self-refresh value being written to the
register, thus over writing any low-power ram settings.

Signed-off-by: Humphrey Bucknell <hbucknell@saitek.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
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Humphrey Bucknell authored and Haavard Skinnemoen committed Sep 1, 2008
1 parent 9e3f544 commit 84c4f2f
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion arch/avr32/mach-at32ap/pm-at32ap700x.S
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Original file line number Diff line number Diff line change
Expand Up @@ -134,7 +134,7 @@ pm_standby:
mov r11, SDRAMC_LPR_LPCB_SELF_RFR
bfins r10, r11, 0, 2 /* LPCB <- self Refresh */
sync 0 /* flush write buffer */
st.w r12[SDRAMC_LPR], r11 /* put SDRAM in self-refresh mode */
st.w r12[SDRAMC_LPR], r10 /* put SDRAM in self-refresh mode */
ld.w r11, r12[SDRAMC_LPR]
unmask_interrupts
sleep CPU_SLEEP_FROZEN
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