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John Crispin says: ==================== net-next: dsa: add QCA8K support This series is based on the AR8xxx series posted by Matthieu Olivari in may 2015. The following changes were made since then * fixed the nitpicks from the previous review * updated to latest API * turned it into an mdio device * added callbacks for fdb, bridge offloading, stp, eee, port status * fixed several minor issues to the port setup and arp learning * changed the namespacing as this driver to qca8k The driver has so far only been tested on qca8337/N. It should work on other QCA switches such as the qca8327 with minor changes. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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* Qualcomm Atheros QCA8xxx switch family | ||
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Required properties: | ||
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- compatible: should be "qca,qca8337" | ||
- #size-cells: must be 0 | ||
- #address-cells: must be 1 | ||
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Subnodes: | ||
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The integrated switch subnode should be specified according to the binding | ||
described in dsa/dsa.txt. As the QCA8K switches do not have a N:N mapping of | ||
port and PHY id, each subnode describing a port needs to have a valid phandle | ||
referencing the internal PHY connected to it. The CPU port of this switch is | ||
always port 0. | ||
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Example: | ||
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&mdio0 { | ||
phy_port1: phy@0 { | ||
reg = <0>; | ||
}; | ||
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phy_port2: phy@1 { | ||
reg = <1>; | ||
}; | ||
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phy_port3: phy@2 { | ||
reg = <2>; | ||
}; | ||
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phy_port4: phy@3 { | ||
reg = <3>; | ||
}; | ||
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phy_port5: phy@4 { | ||
reg = <4>; | ||
}; | ||
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switch0@0 { | ||
compatible = "qca,qca8337"; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
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reg = <0>; | ||
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ports { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
port@0 { | ||
reg = <0>; | ||
label = "cpu"; | ||
ethernet = <&gmac1>; | ||
phy-mode = "rgmii"; | ||
}; | ||
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port@1 { | ||
reg = <1>; | ||
label = "lan1"; | ||
phy-handle = <&phy_port1>; | ||
}; | ||
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port@2 { | ||
reg = <2>; | ||
label = "lan2"; | ||
phy-handle = <&phy_port2>; | ||
}; | ||
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port@3 { | ||
reg = <3>; | ||
label = "lan3"; | ||
phy-handle = <&phy_port3>; | ||
}; | ||
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port@4 { | ||
reg = <4>; | ||
label = "lan4"; | ||
phy-handle = <&phy_port4>; | ||
}; | ||
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port@5 { | ||
reg = <5>; | ||
label = "wan"; | ||
phy-handle = <&phy_port5>; | ||
}; | ||
}; | ||
}; | ||
}; |
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obj-$(CONFIG_NET_DSA_MV88E6060) += mv88e6060.o | ||
obj-$(CONFIG_NET_DSA_BCM_SF2) += bcm_sf2.o | ||
obj-$(CONFIG_NET_DSA_QCA8K) += qca8k.o | ||
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obj-y += b53/ | ||
obj-y += mv88e6xxx/ |
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