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Merge tag 'perf-core-for-mingo-4.11-20170306' of git://git.kernel.org…
…/pub/scm/linux/kernel/git/acme/linux into perf/core Pull perf/core improvements and fixes from Arnaldo Carvalho de Melo: New features: - Allow sorting by symbol_size in 'perf report' and 'perf top' (Charles Baylis) E.g.: # perf report -s symbol_size,symbol Samples: 9K of event 'cycles:k', Event count (approx.): 2870461623 Overhead Symbol size Symbol 14.55% 326 [k] flush_tlb_mm_range 7.20% 1045 [k] filemap_map_pages 5.82% 124 [k] vma_interval_tree_insert 5.18% 2430 [k] unmap_page_range 2.57% 571 [k] vma_interval_tree_remove 1.94% 494 [k] page_add_file_rmap 1.82% 740 [k] page_remove_rmap 1.66% 1017 [k] release_pages 1.57% 1636 [k] update_blocked_averages 1.57% 76 [k] unlock_page - Add support for -p/--pid, -a/--all-cpus and -C/--cpu in 'perf ftrace' (Namhyung Kim) Change in behaviour: - Make system wide (-a) the default option if no target was specified and one of following conditions is met: - No workload specified (current behaviour) - A workload is specified but all requested events are system wide ones, like uncore ones. (Jiri Olsa) Fixes: - Add missing initialization to the instruction decoder used in the intel PT/BTS code, which was causing lots of failures in 'perf test', looking for a value when there was none (Adrian Hunter) Infrastructure changes: - Add arch code needed to adopt the kernel's refcount_t to aid in catching bugs when using atomic_t as a reference counter, basically cmpxchg related functions (Arnaldo Carvalho de Melo) - Convert the code using atomic_t as reference counts to refcount_t (Elena Rashetova) - Add feature test for sched_getcpu() to more easily check for its presence in the many libc implementations and accross different versions of such C libraries (Arnaldo Carvalho de Melo) - Issue a HW watchdog disable hint in 'perf stat' for when some of the requested events can't get counted because a PMU counter is taken by that watchdog (Borislav Petkov). - Add mapping for Intel's KnightsMill PMU events (Karol Wachowski) Documentation changes: - Clarify the term 'convergence' in: perf bench numa numa-mem -h --show_convergence (Jiri Olsa) Kernel code changes: - Ensure probe location is at function entry in kretprobes (Naveen N. Rao) - Allow return probes with offsets and absolute addresses (Naveen N. Rao) Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com> Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Original file line number | Diff line number | Diff line change |
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#ifndef TOOLS_ASM_X86_CMPXCHG_H | ||
#define TOOLS_ASM_X86_CMPXCHG_H | ||
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#include <linux/compiler.h> | ||
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/* | ||
* Non-existant functions to indicate usage errors at link time | ||
* (or compile-time if the compiler implements __compiletime_error(). | ||
*/ | ||
extern void __cmpxchg_wrong_size(void) | ||
__compiletime_error("Bad argument size for cmpxchg"); | ||
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/* | ||
* Constants for operation sizes. On 32-bit, the 64-bit size it set to | ||
* -1 because sizeof will never return -1, thereby making those switch | ||
* case statements guaranteeed dead code which the compiler will | ||
* eliminate, and allowing the "missing symbol in the default case" to | ||
* indicate a usage error. | ||
*/ | ||
#define __X86_CASE_B 1 | ||
#define __X86_CASE_W 2 | ||
#define __X86_CASE_L 4 | ||
#ifdef __x86_64__ | ||
#define __X86_CASE_Q 8 | ||
#else | ||
#define __X86_CASE_Q -1 /* sizeof will never return -1 */ | ||
#endif | ||
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/* | ||
* Atomic compare and exchange. Compare OLD with MEM, if identical, | ||
* store NEW in MEM. Return the initial value in MEM. Success is | ||
* indicated by comparing RETURN with OLD. | ||
*/ | ||
#define __raw_cmpxchg(ptr, old, new, size, lock) \ | ||
({ \ | ||
__typeof__(*(ptr)) __ret; \ | ||
__typeof__(*(ptr)) __old = (old); \ | ||
__typeof__(*(ptr)) __new = (new); \ | ||
switch (size) { \ | ||
case __X86_CASE_B: \ | ||
{ \ | ||
volatile u8 *__ptr = (volatile u8 *)(ptr); \ | ||
asm volatile(lock "cmpxchgb %2,%1" \ | ||
: "=a" (__ret), "+m" (*__ptr) \ | ||
: "q" (__new), "0" (__old) \ | ||
: "memory"); \ | ||
break; \ | ||
} \ | ||
case __X86_CASE_W: \ | ||
{ \ | ||
volatile u16 *__ptr = (volatile u16 *)(ptr); \ | ||
asm volatile(lock "cmpxchgw %2,%1" \ | ||
: "=a" (__ret), "+m" (*__ptr) \ | ||
: "r" (__new), "0" (__old) \ | ||
: "memory"); \ | ||
break; \ | ||
} \ | ||
case __X86_CASE_L: \ | ||
{ \ | ||
volatile u32 *__ptr = (volatile u32 *)(ptr); \ | ||
asm volatile(lock "cmpxchgl %2,%1" \ | ||
: "=a" (__ret), "+m" (*__ptr) \ | ||
: "r" (__new), "0" (__old) \ | ||
: "memory"); \ | ||
break; \ | ||
} \ | ||
case __X86_CASE_Q: \ | ||
{ \ | ||
volatile u64 *__ptr = (volatile u64 *)(ptr); \ | ||
asm volatile(lock "cmpxchgq %2,%1" \ | ||
: "=a" (__ret), "+m" (*__ptr) \ | ||
: "r" (__new), "0" (__old) \ | ||
: "memory"); \ | ||
break; \ | ||
} \ | ||
default: \ | ||
__cmpxchg_wrong_size(); \ | ||
} \ | ||
__ret; \ | ||
}) | ||
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#define __cmpxchg(ptr, old, new, size) \ | ||
__raw_cmpxchg((ptr), (old), (new), (size), LOCK_PREFIX) | ||
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#define cmpxchg(ptr, old, new) \ | ||
__cmpxchg(ptr, old, new, sizeof(*(ptr))) | ||
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#endif /* TOOLS_ASM_X86_CMPXCHG_H */ |
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