Skip to content

Commit

Permalink
ARM: STi: DT: Add STiH407 family tsin2 pinctrl configuration
Browse files Browse the repository at this point in the history 
tsin2 channel can be configured for either serial or parallel data
transfer. This patch adds the pinctrl config for both possibilities.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
  • Loading branch information
Peter Griffin authored and Maxime Coquelin committed Jul 22, 2015
1 parent 71cae84 commit 855617d
Showing 1 changed file with 28 additions and 0 deletions.
28 changes: 28 additions & 0 deletions arch/arm/boot/dts/stih407-pinctrl.dtsi
View file
Original file line number Diff line number Diff line change
Expand Up @@ -495,6 +495,34 @@
};
};
};

tsin2 {
pinctrl_tsin2_parallel: tsin2_parallel {
st,pins {
DATA7 = <&pio13 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
DATA6 = <&pio13 5 ALT2 IN SE_NICLK_IO 0 CLK_B>;
DATA5 = <&pio13 6 ALT2 IN SE_NICLK_IO 0 CLK_B>;
DATA4 = <&pio13 7 ALT2 IN SE_NICLK_IO 0 CLK_B>;
DATA3 = <&pio14 0 ALT2 IN SE_NICLK_IO 0 CLK_A>;
DATA2 = <&pio14 1 ALT2 IN SE_NICLK_IO 0 CLK_B>;
DATA1 = <&pio14 2 ALT2 IN SE_NICLK_IO 0 CLK_A>;
DATA0 = <&pio14 3 ALT2 IN SE_NICLK_IO 0 CLK_A>;
CLKIN = <&pio13 3 ALT1 IN CLKNOTDATA 0 CLK_A>;
VALID = <&pio13 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
ERROR = <&pio13 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
PKCLK = <&pio13 2 ALT1 IN SE_NICLK_IO 0 CLK_A>;
};
};
pinctrl_tsin2_serial: tsin2_serial {
st,pins {
DATA7 = <&pio13 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
CLKIN = <&pio13 3 ALT1 IN CLKNOTDATA 0 CLK_A>;
VALID = <&pio13 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
ERROR = <&pio13 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
PKCLK = <&pio13 2 ALT1 IN SE_NICLK_IO 0 CLK_A>;
};
};
};
};

pin-controller-front1 {
Expand Down

0 comments on commit 855617d

Please sign in to comment.