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ASoC: Manage Speyside system clocking only in bias management
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Now that the CODEC driver supports it defer configuration of the system
clock until bias management which is a much more idiomatic place to do
system power control and makes things a lot more happy when we're using
both interfaces.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
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Mark Brown committed Jun 6, 2011
1 parent cc4c670 commit 85e9e76
Showing 1 changed file with 40 additions and 10 deletions.
50 changes: 40 additions & 10 deletions sound/soc/samsung/speyside.c
Original file line number Diff line number Diff line change
Expand Up @@ -42,11 +42,51 @@ static int speyside_set_bias_level(struct snd_soc_card *card,
pr_err("Failed to stop FLL\n");
return ret;
}
break;

default:
break;
}

return 0;
}

static int speyside_set_bias_level_post(struct snd_soc_card *card,
struct snd_soc_dapm_context *dapm,
enum snd_soc_bias_level level)
{
struct snd_soc_dai *codec_dai = card->rtd[0].codec_dai;
int ret;

if (dapm->dev != codec_dai->dev)
return 0;

switch (level) {
case SND_SOC_BIAS_PREPARE:
if (card->dapm.bias_level == SND_SOC_BIAS_STANDBY) {
ret = snd_soc_dai_set_pll(codec_dai, 0,
WM8915_FLL_MCLK2,
32768, 48000 * 256);
if (ret < 0) {
pr_err("Failed to start FLL\n");
return ret;
}

ret = snd_soc_dai_set_sysclk(codec_dai,
WM8915_SYSCLK_FLL,
48000 * 256,
SND_SOC_CLOCK_IN);
if (ret < 0)
return ret;
}
break;

default:
break;
}

card->dapm.bias_level = level;

return 0;
}

Expand All @@ -70,16 +110,6 @@ static int speyside_hw_params(struct snd_pcm_substream *substream,
if (ret < 0)
return ret;

ret = snd_soc_dai_set_pll(codec_dai, 0, WM8915_FLL_MCLK2,
32768, 256 * 48000);
if (ret < 0)
return ret;

ret = snd_soc_dai_set_sysclk(codec_dai, WM8915_SYSCLK_FLL,
256 * 48000, SND_SOC_CLOCK_IN);
if (ret < 0)
return ret;

return 0;
}

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