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drm/nouveau/fb: merge fb/vram and port to subdev interfaces
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs committed Oct 3, 2012
1 parent 0134a97 commit 861d210
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Showing 49 changed files with 1,691 additions and 1,345 deletions.
5 changes: 3 additions & 2 deletions drivers/gpu/drm/nouveau/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,7 @@ ccflags-y += -I$(src)

nouveau-y := core/core/client.o
nouveau-y += core/core/engine.o
nouveau-y += core/core/enum.o
nouveau-y += core/core/handle.o
nouveau-y += core/core/mm.o
nouveau-y += core/core/namedb.o
Expand Down Expand Up @@ -50,15 +51,14 @@ nouveau-y += core/subdev/devinit/nv10.o
nouveau-y += core/subdev/devinit/nv1a.o
nouveau-y += core/subdev/devinit/nv20.o
nouveau-y += core/subdev/devinit/nv50.o
nouveau-y += core/subdev/fb/base.o
nouveau-y += core/subdev/fb/nv04.o
nouveau-y += core/subdev/fb/nv10.o
nouveau-y += core/subdev/fb/nv20.o
nouveau-y += core/subdev/fb/nv30.o
nouveau-y += core/subdev/fb/nv40.o
nouveau-y += core/subdev/fb/nv50.o
nouveau-y += core/subdev/fb/nvc0.o
nouveau-y += core/subdev/fb/nv50_vram.o
nouveau-y += core/subdev/fb/nvc0_vram.o
nouveau-y += core/subdev/gpio/base.o
nouveau-y += core/subdev/gpio/nv10.o
nouveau-y += core/subdev/gpio/nv50.o
Expand All @@ -69,6 +69,7 @@ nouveau-y += core/subdev/i2c/bit.o
nouveau-y += core/subdev/instmem/nv04.o
nouveau-y += core/subdev/instmem/nv50.o
nouveau-y += core/subdev/instmem/nvc0.o
nouveau-y += core/subdev/ltcg/nvc0.o
nouveau-y += core/subdev/mc/base.o
nouveau-y += core/subdev/mc/nv04.o
nouveau-y += core/subdev/mc/nv44.o
Expand Down
2 changes: 1 addition & 1 deletion drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c
Original file line number Diff line number Diff line change
Expand Up @@ -163,7 +163,7 @@ nv40_fifo_init(struct drm_device *dev, int engine)
break;
default:
nv_wr32(dev, 0x002230, 0x00000000);
nv_wr32(dev, 0x002220, ((dev_priv->vram_size - 512 * 1024 +
nv_wr32(dev, 0x002220, ((nvfb_vram_size(dev) - 512 * 1024 +
dev_priv->ramfc->pinst) >> 16) |
0x00030000);
break;
Expand Down
4 changes: 1 addition & 3 deletions drivers/gpu/drm/nouveau/core/engine/graph/nv10.c
Original file line number Diff line number Diff line change
Expand Up @@ -895,9 +895,7 @@ nv10_graph_context_del(struct nouveau_channel *chan, int engine)
static void
nv10_graph_set_tile_region(struct drm_device *dev, int i)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
struct nouveau_tile_reg *tile = &dev_priv->tile.reg[i];

struct nouveau_fb_tile *tile = nvfb_tile(dev, i);
nv_wr32(dev, NV10_PGRAPH_TLIMIT(i), tile->limit);
nv_wr32(dev, NV10_PGRAPH_TSIZE(i), tile->pitch);
nv_wr32(dev, NV10_PGRAPH_TILE(i), tile->addr);
Expand Down
2 changes: 1 addition & 1 deletion drivers/gpu/drm/nouveau/core/engine/graph/nv20.c
Original file line number Diff line number Diff line change
Expand Up @@ -472,7 +472,7 @@ static void
nv20_graph_set_tile_region(struct drm_device *dev, int i)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
struct nouveau_tile_reg *tile = &dev_priv->tile.reg[i];
struct nouveau_fb_tile *tile = nvfb_tile(dev, i);

nv_wr32(dev, NV20_PGRAPH_TLIMIT(i), tile->limit);
nv_wr32(dev, NV20_PGRAPH_TSIZE(i), tile->pitch);
Expand Down
5 changes: 2 additions & 3 deletions drivers/gpu/drm/nouveau/core/engine/graph/nv40.c
Original file line number Diff line number Diff line change
Expand Up @@ -125,7 +125,7 @@ static void
nv40_graph_set_tile_region(struct drm_device *dev, int i)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
struct nouveau_tile_reg *tile = &dev_priv->tile.reg[i];
struct nouveau_fb_tile *tile = nvfb_tile(dev, i);

switch (dev_priv->chipset) {
case 0x40:
Expand Down Expand Up @@ -178,7 +178,6 @@ nv40_graph_init(struct drm_device *dev, int engine)
{
struct nv40_graph_engine *pgraph = nv_engine(dev, engine);
struct drm_nouveau_private *dev_priv = dev->dev_private;
struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
uint32_t vramsz;
int i, j;

Expand Down Expand Up @@ -280,7 +279,7 @@ nv40_graph_init(struct drm_device *dev, int engine)
}

/* Turn all the tiling regions off. */
for (i = 0; i < pfb->num_tiles; i++)
for (i = 0; i < nvfb_tile_nr(dev); i++)
nv40_graph_set_tile_region(dev, i);

/* begin RAM config */
Expand Down
7 changes: 2 additions & 5 deletions drivers/gpu/drm/nouveau/core/engine/mpeg/nv31.c
Original file line number Diff line number Diff line change
Expand Up @@ -128,7 +128,6 @@ nv31_mpeg_object_new(struct nouveau_channel *chan, int engine,
static int
nv31_mpeg_init(struct drm_device *dev, int engine)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
struct nv31_mpeg_engine *pmpeg = nv_engine(dev, engine);
int i;

Expand All @@ -138,7 +137,7 @@ nv31_mpeg_init(struct drm_device *dev, int engine)
nv_wr32(dev, 0x00b0e0, 0x00000020); /* nvidia: rd 0x01, wr 0x20 */
nv_wr32(dev, 0x00b0e8, 0x00000020); /* nvidia: rd 0x01, wr 0x20 */

for (i = 0; i < dev_priv->engine.fb.num_tiles; i++)
for (i = 0; i < nvfb_tile_nr(dev); i++)
pmpeg->base.set_tile_region(dev, i);

/* PMPEG init */
Expand Down Expand Up @@ -235,9 +234,7 @@ nv31_mpeg_isr_chid(struct drm_device *dev, u32 inst)
static void
nv31_vpe_set_tile_region(struct drm_device *dev, int i)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
struct nouveau_tile_reg *tile = &dev_priv->tile.reg[i];

struct nouveau_fb_tile *tile = nvfb_tile(dev, i);
nv_wr32(dev, 0x00b008 + (i * 0x10), tile->pitch);
nv_wr32(dev, 0x00b004 + (i * 0x10), tile->limit);
nv_wr32(dev, 0x00b000 + (i * 0x10), tile->addr);
Expand Down
137 changes: 137 additions & 0 deletions drivers/gpu/drm/nouveau/core/include/subdev/fb.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,137 @@
#ifndef __NOUVEAU_FB_H__
#define __NOUVEAU_FB_H__

#ifndef XXX_THIS_IS_A_HACK
#include <core/subdev.h>
#include <core/device.h>
#endif
#include <core/mm.h>
#include <subdev/vm.h>

/* memory type/access flags, do not match hardware values */
#define NV_MEM_ACCESS_RO 1
#define NV_MEM_ACCESS_WO 2
#define NV_MEM_ACCESS_RW (NV_MEM_ACCESS_RO | NV_MEM_ACCESS_WO)
#define NV_MEM_ACCESS_SYS 4
#define NV_MEM_ACCESS_VM 8
#define NV_MEM_ACCESS_NOSNOOP 16

#define NV_MEM_TARGET_VRAM 0
#define NV_MEM_TARGET_PCI 1
#define NV_MEM_TARGET_PCI_NOSNOOP 2
#define NV_MEM_TARGET_VM 3
#define NV_MEM_TARGET_GART 4

#define NV_MEM_TYPE_VM 0x7f
#define NV_MEM_COMP_VM 0x03

struct nouveau_mem {
struct drm_device *dev;

struct nouveau_vma bar_vma;
struct nouveau_vma vma[2];
u8 page_shift;

struct nouveau_mm_node *tag;
struct list_head regions;
dma_addr_t *pages;
u32 memtype;
u64 offset;
u64 size;
struct sg_table *sg;
};

struct nouveau_fb_tile {
struct nouveau_mm_node *tag;
u32 addr;
u32 limit;
u32 pitch;
u32 zcomp;
};

#ifndef XXX_THIS_IS_A_HACK
struct nouveau_fb {
struct nouveau_subdev base;

bool (*memtype_valid)(struct nouveau_fb *, u32 memtype);

struct {
enum {
NV_MEM_TYPE_UNKNOWN = 0,
NV_MEM_TYPE_STOLEN,
NV_MEM_TYPE_SGRAM,
NV_MEM_TYPE_SDRAM,
NV_MEM_TYPE_DDR1,
NV_MEM_TYPE_DDR2,
NV_MEM_TYPE_DDR3,
NV_MEM_TYPE_GDDR2,
NV_MEM_TYPE_GDDR3,
NV_MEM_TYPE_GDDR4,
NV_MEM_TYPE_GDDR5
} type;
u64 stolen;
u64 size;
int ranks;

int (*get)(struct nouveau_fb *, u64 size, u32 align,
u32 size_nc, u32 type, struct nouveau_mem **);
void (*put)(struct nouveau_fb *, struct nouveau_mem **);
} ram;

struct nouveau_mm vram;
struct nouveau_mm tags;

struct {
struct nouveau_fb_tile region[16];
int regions;
void (*init)(struct nouveau_fb *, int i, u32 addr, u32 size,
u32 pitch, u32 flags, struct nouveau_fb_tile *);
void (*fini)(struct nouveau_fb *, int i,
struct nouveau_fb_tile *);
void (*prog)(struct nouveau_fb *, int i,
struct nouveau_fb_tile *);
} tile;
};

static inline struct nouveau_fb *
nouveau_fb(void *obj)
{
return (void *)nv_device(obj)->subdev[NVDEV_SUBDEV_FB];
}

#define nouveau_fb_create(p,e,c,d) \
nouveau_subdev_create((p), (e), (c), 0, "PFB", "fb", (d))
int nouveau_fb_created(struct nouveau_fb *);
void nouveau_fb_destroy(struct nouveau_fb *);
int nouveau_fb_init(struct nouveau_fb *);
#define nouveau_fb_fini(p,s) \
nouveau_subdev_fini(&(p)->base, (s))

void _nouveau_fb_dtor(struct nouveau_object *);
int _nouveau_fb_init(struct nouveau_object *);
#define _nouveau_fb_fini _nouveau_subdev_fini

extern struct nouveau_oclass nv04_fb_oclass;
extern struct nouveau_oclass nv10_fb_oclass;
extern struct nouveau_oclass nv20_fb_oclass;
extern struct nouveau_oclass nv30_fb_oclass;
extern struct nouveau_oclass nv40_fb_oclass;
extern struct nouveau_oclass nv50_fb_oclass;
extern struct nouveau_oclass nvc0_fb_oclass;

struct nouveau_bios;
int nouveau_fb_bios_memtype(struct nouveau_bios *);

bool nv04_fb_memtype_valid(struct nouveau_fb *, u32 memtype);

void nv10_fb_tile_prog(struct nouveau_fb *, int, struct nouveau_fb_tile *);

void nv30_fb_tile_init(struct nouveau_fb *, int i, u32 addr, u32 size,
u32 pitch, u32 flags, struct nouveau_fb_tile *);
void nv30_fb_tile_fini(struct nouveau_fb *, int i, struct nouveau_fb_tile *);

void nv50_fb_vram_del(struct nouveau_fb *, struct nouveau_mem **);
void nv50_fb_trap(struct nouveau_fb *, int display);
#endif

#endif
33 changes: 33 additions & 0 deletions drivers/gpu/drm/nouveau/core/include/subdev/ltcg.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,33 @@
#ifndef __NOUVEAU_LTCG_H__
#define __NOUVEAU_LTCG_H__

#include <core/subdev.h>
#include <core/device.h>

struct nouveau_ltcg {
struct nouveau_subdev base;
};

static inline struct nouveau_ltcg *
nouveau_ltcg(void *obj)
{
return (void *)nv_device(obj)->subdev[NVDEV_SUBDEV_LTCG];
}

#define nouveau_ltcg_create(p,e,o,d) \
nouveau_subdev_create_((p), (e), (o), 0, "PLTCG", "level2", \
sizeof(**d), (void **)d)
#define nouveau_ltcg_destroy(p) \
nouveau_subdev_destroy(&(p)->base)
#define nouveau_ltcg_init(p) \
nouveau_subdev_init(&(p)->base)
#define nouveau_ltcg_fini(p,s) \
nouveau_subdev_fini(&(p)->base, (s))

#define _nouveau_ltcg_dtor _nouveau_subdev_dtor
#define _nouveau_ltcg_init _nouveau_subdev_init
#define _nouveau_ltcg_fini _nouveau_subdev_fini

extern struct nouveau_oclass nvc0_ltcg_oclass;

#endif
5 changes: 2 additions & 3 deletions drivers/gpu/drm/nouveau/core/include/subdev/vm.h
Original file line number Diff line number Diff line change
Expand Up @@ -25,11 +25,10 @@
#ifndef __NOUVEAU_VM_H__
#define __NOUVEAU_VM_H__

#include "drmP.h"

#include "nouveau_drv.h"
#include <core/mm.h>

struct nouveau_mem;

struct nouveau_vm_pgt {
struct nouveau_gpuobj *obj[2];
u32 refcount[2];
Expand Down
3 changes: 3 additions & 0 deletions drivers/gpu/drm/nouveau/core/subdev/device/nv04.c
Original file line number Diff line number Diff line change
Expand Up @@ -29,6 +29,7 @@
#include <subdev/devinit.h>
#include <subdev/mc.h>
#include <subdev/timer.h>
#include <subdev/fb.h>

int
nv04_identify(struct nouveau_device *device)
Expand All @@ -41,6 +42,7 @@ nv04_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv04_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = &nv04_fb_oclass;
break;
case 0x05:
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
Expand All @@ -49,6 +51,7 @@ nv04_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv05_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = &nv04_fb_oclass;
break;
default:
nv_fatal(device, "unknown RIVA chipset\n");
Expand Down
9 changes: 9 additions & 0 deletions drivers/gpu/drm/nouveau/core/subdev/device/nv10.c
Original file line number Diff line number Diff line change
Expand Up @@ -30,6 +30,7 @@
#include <subdev/devinit.h>
#include <subdev/mc.h>
#include <subdev/timer.h>
#include <subdev/fb.h>

int
nv10_identify(struct nouveau_device *device)
Expand All @@ -43,6 +44,7 @@ nv10_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass;
break;
case 0x15:
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
Expand All @@ -52,6 +54,7 @@ nv10_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass;
break;
case 0x16:
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
Expand All @@ -61,6 +64,7 @@ nv10_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass;
break;
case 0x1a:
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
Expand All @@ -70,6 +74,7 @@ nv10_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass;
break;
case 0x11:
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
Expand All @@ -79,6 +84,7 @@ nv10_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass;
break;
case 0x17:
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
Expand All @@ -88,6 +94,7 @@ nv10_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass;
break;
case 0x1f:
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
Expand All @@ -97,6 +104,7 @@ nv10_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass;
break;
case 0x18:
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
Expand All @@ -106,6 +114,7 @@ nv10_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass;
break;
default:
nv_fatal(device, "unknown Celsius chipset\n");
Expand Down
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