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[media] media: coda: firmware loading for 64-bit AXI bus width
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Add support for loading a raw firmware with 16-bit chars ordered in
little-endian 64-bit words, corresponding to the memory access pattern
of CODA7 and above: When writing the boot code into the code download
register, the chars have to be reordered back.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: Javier Martin <javier.martin@vista-silicon.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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Philipp Zabel authored and Mauro Carvalho Chehab committed Sep 26, 2012
1 parent c3aac8b commit 87048bb
Showing 1 changed file with 22 additions and 12 deletions.
34 changes: 22 additions & 12 deletions drivers/media/platform/coda.c
Original file line number Diff line number Diff line change
Expand Up @@ -1513,7 +1513,7 @@ static char *coda_product_name(int product)
}
}

static int coda_hw_init(struct coda_dev *dev, const struct firmware *fw)
static int coda_hw_init(struct coda_dev *dev)
{
u16 product, major, minor, release;
u32 data;
Expand All @@ -1523,21 +1523,27 @@ static int coda_hw_init(struct coda_dev *dev, const struct firmware *fw)
clk_prepare_enable(dev->clk_per);
clk_prepare_enable(dev->clk_ahb);

/* Copy the whole firmware image to the code buffer */
memcpy(dev->codebuf.vaddr, fw->data, fw->size);
/*
* Copy the first CODA_ISRAM_SIZE in the internal SRAM.
* This memory seems to be big-endian here, which is weird, since
* the internal ARM processor of the coda is little endian.
* The 16-bit chars in the code buffer are in memory access
* order, re-sort them to CODA order for register download.
* Data in this SRAM survives a reboot.
*/
p = (u16 *)fw->data;
for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
data = CODA_DOWN_ADDRESS_SET(i) |
CODA_DOWN_DATA_SET(p[i ^ 1]);
coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
p = (u16 *)dev->codebuf.vaddr;
if (dev->devtype->product == CODA_DX6) {
for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
data = CODA_DOWN_ADDRESS_SET(i) |
CODA_DOWN_DATA_SET(p[i ^ 1]);
coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
}
} else {
for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
data = CODA_DOWN_ADDRESS_SET(i) |
CODA_DOWN_DATA_SET(p[round_down(i, 4) +
3 - (i % 4)]);
coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
}
}
release_firmware(fw);

/* Tell the BIT where to find everything it needs */
coda_write(dev, dev->workbuf.paddr,
Expand Down Expand Up @@ -1633,7 +1639,11 @@ static void coda_fw_callback(const struct firmware *fw, void *context)
return;
}

ret = coda_hw_init(dev, fw);
/* Copy the whole firmware image to the code buffer */
memcpy(dev->codebuf.vaddr, fw->data, fw->size);
release_firmware(fw);

ret = coda_hw_init(dev);
if (ret) {
v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
return;
Expand Down

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