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[ARM] Set bit 4 on section mappings correctly depending on CPU
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On some CPUs, bit 4 of section mappings means "update the
cache when written to".  On others, this bit is required to
be one, and others it's required to be zero.  Finally, on
ARMv6 and above, setting it turns on "no execute" and prevents
speculative prefetches.

With all these combinations, no one value fits all CPUs, so we
have to pick a value depending on the CPU type, and the area
we're mapping.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored and Russell King committed Jun 29, 2006
1 parent 326764a commit 8799ee9
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Showing 20 changed files with 147 additions and 22 deletions.
3 changes: 2 additions & 1 deletion arch/arm/kernel/asm-offsets.c
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Expand Up @@ -105,6 +105,7 @@ int main(void)
BLANK();
DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list));
DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush));
DEFINE(PROCINFO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mmu_flags));
DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags));
return 0;
}
5 changes: 2 additions & 3 deletions arch/arm/kernel/head.S
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Expand Up @@ -221,7 +221,7 @@ __create_page_tables:
teq r0, r6
bne 1b

ldr r7, [r10, #PROCINFO_MMUFLAGS] @ mmuflags
ldr r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags

/*
* Create identity mapping for first MB of kernel to
Expand Down Expand Up @@ -272,8 +272,7 @@ __create_page_tables:
#endif

#ifdef CONFIG_DEBUG_LL
bic r7, r7, #0x0c @ turn off cacheable
@ and bufferable bits
ldr r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags
/*
* Map in IO space for serial debugging.
* This allows debug messages to be output
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37 changes: 22 additions & 15 deletions arch/arm/mm/mm-armv.c
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Expand Up @@ -303,16 +303,16 @@ static struct mem_types mem_types[] __initdata = {
.prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
L_PTE_WRITE,
.prot_l1 = PMD_TYPE_TABLE,
.prot_sect = PMD_TYPE_SECT | PMD_SECT_UNCACHED |
.prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_UNCACHED |
PMD_SECT_AP_WRITE,
.domain = DOMAIN_IO,
},
[MT_CACHECLEAN] = {
.prot_sect = PMD_TYPE_SECT,
.prot_sect = PMD_TYPE_SECT | PMD_BIT4,
.domain = DOMAIN_KERNEL,
},
[MT_MINICLEAN] = {
.prot_sect = PMD_TYPE_SECT | PMD_SECT_MINICACHE,
.prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_MINICACHE,
.domain = DOMAIN_KERNEL,
},
[MT_LOW_VECTORS] = {
Expand All @@ -328,25 +328,25 @@ static struct mem_types mem_types[] __initdata = {
.domain = DOMAIN_USER,
},
[MT_MEMORY] = {
.prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
.prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_AP_WRITE,
.domain = DOMAIN_KERNEL,
},
[MT_ROM] = {
.prot_sect = PMD_TYPE_SECT,
.prot_sect = PMD_TYPE_SECT | PMD_BIT4,
.domain = DOMAIN_KERNEL,
},
[MT_IXP2000_DEVICE] = { /* IXP2400 requires XCB=101 for on-chip I/O */
.prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
L_PTE_WRITE,
.prot_l1 = PMD_TYPE_TABLE,
.prot_sect = PMD_TYPE_SECT | PMD_SECT_UNCACHED |
.prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_UNCACHED |
PMD_SECT_AP_WRITE | PMD_SECT_BUFFERABLE |
PMD_SECT_TEX(1),
.domain = DOMAIN_IO,
},
[MT_NONSHARED_DEVICE] = {
.prot_l1 = PMD_TYPE_TABLE,
.prot_sect = PMD_TYPE_SECT | PMD_SECT_NONSHARED_DEV |
.prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_NONSHARED_DEV |
PMD_SECT_AP_WRITE,
.domain = DOMAIN_IO,
}
Expand Down Expand Up @@ -376,14 +376,21 @@ void __init build_mem_type_table(void)
ecc_mask = 0;
}

if (cpu_arch <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) {
for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
/*
* Xscale must not have PMD bit 4 set for section mappings.
*/
if (cpu_is_xscale())
for (i = 0; i < ARRAY_SIZE(mem_types); i++)
mem_types[i].prot_sect &= ~PMD_BIT4;

/*
* ARMv5 and lower, excluding Xscale, bit 4 must be set for
* page tables.
*/
if (cpu_arch < CPU_ARCH_ARMv6 && !cpu_is_xscale())
for (i = 0; i < ARRAY_SIZE(mem_types); i++)
if (mem_types[i].prot_l1)
mem_types[i].prot_l1 |= PMD_BIT4;
if (mem_types[i].prot_sect)
mem_types[i].prot_sect |= PMD_BIT4;
}
}

cp = &cache_policies[cachepolicy];
kern_pgprot = user_pgprot = cp->pte;
Expand All @@ -407,8 +414,8 @@ void __init build_mem_type_table(void)
* bit 4 becomes XN which we must clear for the
* kernel memory mapping.
*/
mem_types[MT_MEMORY].prot_sect &= ~PMD_BIT4;
mem_types[MT_ROM].prot_sect &= ~PMD_BIT4;
mem_types[MT_MEMORY].prot_sect &= ~PMD_SECT_XN;
mem_types[MT_ROM].prot_sect &= ~PMD_SECT_XN;

/*
* Mark cache clean areas and XIP ROM read only
Expand Down
3 changes: 3 additions & 0 deletions arch/arm/mm/proc-arm1020.S
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Original file line number Diff line number Diff line change
Expand Up @@ -524,6 +524,9 @@ cpu_arm1020_name:
__arm1020_proc_info:
.long 0x4104a200 @ ARM 1020T (Architecture v5T)
.long 0xff0ffff0
.long PMD_TYPE_SECT | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
.long PMD_TYPE_SECT | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
Expand Down
4 changes: 4 additions & 0 deletions arch/arm/mm/proc-arm1020e.S
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Expand Up @@ -488,6 +488,10 @@ cpu_arm1020e_name:
__arm1020e_proc_info:
.long 0x4105a200 @ ARM 1020TE (Architecture v5TE)
.long 0xff0ffff0
.long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
.long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
Expand Down
4 changes: 4 additions & 0 deletions arch/arm/mm/proc-arm1022.S
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Expand Up @@ -471,6 +471,10 @@ cpu_arm1022_name:
__arm1022_proc_info:
.long 0x4105a220 @ ARM 1022E (v5TE)
.long 0xff0ffff0
.long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
.long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
Expand Down
4 changes: 4 additions & 0 deletions arch/arm/mm/proc-arm1026.S
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Expand Up @@ -467,6 +467,10 @@ cpu_arm1026_name:
__arm1026_proc_info:
.long 0x4106a260 @ ARM 1026EJ-S (v5TEJ)
.long 0xff0ffff0
.long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
.long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
Expand Down
16 changes: 16 additions & 0 deletions arch/arm/mm/proc-arm6_7.S
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Original file line number Diff line number Diff line change
Expand Up @@ -355,6 +355,10 @@ __arm6_proc_info:
.long 0x41560600
.long 0xfffffff0
.long 0x00000c1e
.long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm6_setup
.long cpu_arch_name
.long cpu_elf_name
Expand All @@ -371,6 +375,10 @@ __arm610_proc_info:
.long 0x41560610
.long 0xfffffff0
.long 0x00000c1e
.long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm6_setup
.long cpu_arch_name
.long cpu_elf_name
Expand All @@ -387,6 +395,10 @@ __arm7_proc_info:
.long 0x41007000
.long 0xffffff00
.long 0x00000c1e
.long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm7_setup
.long cpu_arch_name
.long cpu_elf_name
Expand All @@ -408,6 +420,10 @@ __arm710_proc_info:
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
.long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm7_setup
.long cpu_arch_name
.long cpu_elf_name
Expand Down
8 changes: 8 additions & 0 deletions arch/arm/mm/proc-arm720.S
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Original file line number Diff line number Diff line change
Expand Up @@ -246,6 +246,10 @@ __arm710_proc_info:
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
.long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm710_setup @ cpu_flush
.long cpu_arch_name @ arch_name
.long cpu_elf_name @ elf_name
Expand All @@ -267,6 +271,10 @@ __arm720_proc_info:
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
.long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm720_setup @ cpu_flush
.long cpu_arch_name @ arch_name
.long cpu_elf_name @ elf_name
Expand Down
4 changes: 4 additions & 0 deletions arch/arm/mm/proc-arm920.S
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Expand Up @@ -461,6 +461,10 @@ __arm920_proc_info:
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
.long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm920_setup
.long cpu_arch_name
.long cpu_elf_name
Expand Down
4 changes: 4 additions & 0 deletions arch/arm/mm/proc-arm922.S
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Expand Up @@ -465,6 +465,10 @@ __arm922_proc_info:
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
.long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm922_setup
.long cpu_arch_name
.long cpu_elf_name
Expand Down
8 changes: 8 additions & 0 deletions arch/arm/mm/proc-arm925.S
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Expand Up @@ -522,6 +522,10 @@ cpu_arm925_name:
__arm925_proc_info:
.long 0x54029250
.long 0xfffffff0
.long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
.long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
Expand All @@ -541,6 +545,10 @@ __arm925_proc_info:
__arm915_proc_info:
.long 0x54029150
.long 0xfffffff0
.long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
.long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
Expand Down
4 changes: 4 additions & 0 deletions arch/arm/mm/proc-arm926.S
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Expand Up @@ -477,6 +477,10 @@ __arm926_proc_info:
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
.long PMD_TYPE_SECT | \
PMD_BIT4 | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __arm926_setup
.long cpu_arch_name
.long cpu_elf_name
Expand Down
3 changes: 3 additions & 0 deletions arch/arm/mm/proc-sa110.S
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Original file line number Diff line number Diff line change
Expand Up @@ -255,6 +255,9 @@ __sa110_proc_info:
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
.long PMD_TYPE_SECT | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __sa110_setup
.long cpu_arch_name
.long cpu_elf_name
Expand Down
6 changes: 6 additions & 0 deletions arch/arm/mm/proc-sa1100.S
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Original file line number Diff line number Diff line change
Expand Up @@ -276,6 +276,9 @@ __sa1100_proc_info:
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
.long PMD_TYPE_SECT | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __sa1100_setup
.long cpu_arch_name
.long cpu_elf_name
Expand All @@ -296,6 +299,9 @@ __sa1110_proc_info:
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
.long PMD_TYPE_SECT | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __sa1100_setup
.long cpu_arch_name
.long cpu_elf_name
Expand Down
4 changes: 4 additions & 0 deletions arch/arm/mm/proc-v6.S
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Original file line number Diff line number Diff line change
Expand Up @@ -269,6 +269,10 @@ __v6_proc_info:
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
.long PMD_TYPE_SECT | \
PMD_SECT_XN | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __v6_setup
.long cpu_arch_name
.long cpu_elf_name
Expand Down
9 changes: 8 additions & 1 deletion arch/arm/mm/proc-xsc3.S
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Original file line number Diff line number Diff line change
Expand Up @@ -487,7 +487,14 @@ cpu_xsc3_name:
__xsc3_proc_info:
.long 0x69056000
.long 0xffffe000
.long 0x00000c0e
.long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
.long PMD_TYPE_SECT | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __xsc3_setup
.long cpu_arch_name
.long cpu_elf_name
Expand Down
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