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arm64: dts: Add support for NXP LS1028A SoC
LS1028A contains two ARM v8 CortexA72 processor cores
with 32 KB L1-D cache and 48 KB L1-I cache
Features summary
Two 32-bit / 64-bit ARM v8 Cortex-A72 CPUs
- Arranged as single clusters of two cores sharing a 1 MB L2 cache
- Speed Up to 1.3 GHz
- Support for cluster power-gating.
Cache coherent interconnect (CCI-400)
- Hardware-managed data coherency
- Up to 400 MHz
32-bit DDR4 SDRAM memory controller with ECC
Two PCIe 3.0 controllers
One serial ATA (SATA 3.0) controller
Two high-speed USB 3.0 controllers with integrated PHY
Following levels of DTSI/DTS files have been created for the LS1028A
SoC family:
- fsl-ls1028a.dtsi:
DTS-Include file for NXP LS1028A SoC.
- fsl-ls1028a-qds.dts:
DTS file for NXP LS1028A QDS board.
- fsl-ls1028a-rdb.dts:
DTS file for NXP LS1028A RDB board
Signed-off-by: Sudhanshu Gupta <sudhanshu.gupta@nxp.com>
Signed-off-by: Rai Harninder <harninder.rai@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>- Loading branch information
Bhaskar Upadhaya
authored and
Shawn Guo
committed
Dec 8, 2018
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,93 @@ | ||
| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
| /* | ||
| * Device Tree file for NXP LS1028A QDS Board. | ||
| * | ||
| * Copyright 2018 NXP | ||
| * | ||
| * Harninder Rai <harninder.rai@nxp.com> | ||
| * | ||
| */ | ||
|
|
||
| /dts-v1/; | ||
|
|
||
| #include "fsl-ls1028a.dtsi" | ||
|
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| / { | ||
| model = "LS1028A QDS Board"; | ||
| compatible = "fsl,ls1028a-qds", "fsl,ls1028a"; | ||
|
|
||
| aliases { | ||
| gpio0 = &gpio1; | ||
| gpio1 = &gpio2; | ||
| gpio2 = &gpio3; | ||
| serial0 = &duart0; | ||
| serial1 = &duart1; | ||
| }; | ||
|
|
||
| chosen { | ||
| stdout-path = "serial0:115200n8"; | ||
| }; | ||
|
|
||
| memory@80000000 { | ||
| device_type = "memory"; | ||
| reg = <0x0 0x80000000 0x1 0x00000000>; | ||
| }; | ||
| }; | ||
|
|
||
| &duart0 { | ||
| status = "okay"; | ||
| }; | ||
|
|
||
| &duart1 { | ||
| status = "okay"; | ||
| }; | ||
|
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||
| &i2c0 { | ||
| status = "okay"; | ||
|
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||
| i2c-mux@77 { | ||
| compatible = "nxp,pca9847"; | ||
| reg = <0x77>; | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
|
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||
| i2c@2 { | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
| reg = <0x2>; | ||
|
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||
| current-monitor@40 { | ||
| compatible = "ti,ina220"; | ||
| reg = <0x40>; | ||
| shunt-resistor = <1000>; | ||
| }; | ||
|
|
||
| current-monitor@41 { | ||
| compatible = "ti,ina220"; | ||
| reg = <0x41>; | ||
| shunt-resistor = <1000>; | ||
| }; | ||
| }; | ||
|
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||
| i2c@3 { | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
| reg = <0x3>; | ||
|
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||
| rtc@51 { | ||
| compatible = "nxp,pcf2129"; | ||
| reg = <0x51>; | ||
| }; | ||
|
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||
| eeprom@56 { | ||
| compatible = "atmel,24c512"; | ||
| reg = <0x56>; | ||
| }; | ||
|
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||
| eeprom@57 { | ||
| compatible = "atmel,24c512"; | ||
| reg = <0x57>; | ||
| }; | ||
| }; | ||
| }; | ||
| }; |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,73 @@ | ||
| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
| /* | ||
| * Device Tree file for NXP LS1028A RDB Board. | ||
| * | ||
| * Copyright 2018 NXP | ||
| * | ||
| * Harninder Rai <harninder.rai@nxp.com> | ||
| * | ||
| */ | ||
|
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||
| /dts-v1/; | ||
| #include "fsl-ls1028a.dtsi" | ||
|
|
||
| / { | ||
| model = "LS1028A RDB Board"; | ||
| compatible = "fsl,ls1028a-rdb", "fsl,ls1028a"; | ||
|
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| aliases { | ||
| serial0 = &duart0; | ||
| serial1 = &duart1; | ||
| }; | ||
|
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||
| chosen { | ||
| stdout-path = "serial0:115200n8"; | ||
| }; | ||
|
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| memory@80000000 { | ||
| device_type = "memory"; | ||
| reg = <0x0 0x80000000 0x1 0x0000000>; | ||
| }; | ||
| }; | ||
|
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| &i2c0 { | ||
| status = "okay"; | ||
|
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||
| i2c-mux@77 { | ||
| compatible = "nxp,pca9847"; | ||
| reg = <0x77>; | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
|
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||
| i2c@2 { | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
| reg = <0x02>; | ||
|
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||
| current-monitor@40 { | ||
| compatible = "ti,ina220"; | ||
| reg = <0x40>; | ||
| shunt-resistor = <500>; | ||
| }; | ||
| }; | ||
|
|
||
| i2c@3 { | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
| reg = <0x3>; | ||
|
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||
| rtc@51 { | ||
| compatible = "nxp,pcf2129"; | ||
| reg = <0x51>; | ||
| }; | ||
| }; | ||
| }; | ||
| }; | ||
|
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| &duart0 { | ||
| status = "okay"; | ||
| }; | ||
|
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||
| &duart1 { | ||
| status = "okay"; | ||
| }; |
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