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net: dsa: mt7530: Extend device data ready for adding a new hardware
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Add a structure holding required operations for each device such as device
initialization, PHY port read or write, a checker whether PHY interface is
supported on a certain port, MAC port setup for either bus pad or a
specific PHY interface.

The patch is done for ready adding a new hardware MT7531, and keep the
same setup logic of existing hardware.

Signed-off-by: Landen Chao <landen.chao@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Landen Chao authored and David S. Miller committed Sep 14, 2020
1 parent dc8ef93 commit 88bdef8
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Showing 2 changed files with 234 additions and 74 deletions.
271 changes: 198 additions & 73 deletions drivers/net/dsa/mt7530.c
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Original file line number Diff line number Diff line change
Expand Up @@ -372,8 +372,9 @@ mt7530_fdb_write(struct mt7530_priv *priv, u16 vid,
mt7530_write(priv, MT7530_ATA1 + (i * 4), reg[i]);
}

/* Setup TX circuit including relevant PAD and driving */
static int
mt7530_pad_clk_setup(struct dsa_switch *ds, int mode)
mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface)
{
struct mt7530_priv *priv = ds->priv;
u32 ncpo1, ssc_delta, trgint, i, xtal;
Expand All @@ -387,7 +388,7 @@ mt7530_pad_clk_setup(struct dsa_switch *ds, int mode)
return -EINVAL;
}

switch (mode) {
switch (interface) {
case PHY_INTERFACE_MODE_RGMII:
trgint = 0;
/* PLL frequency: 125MHz */
Expand All @@ -409,7 +410,8 @@ mt7530_pad_clk_setup(struct dsa_switch *ds, int mode)
}
break;
default:
dev_err(priv->dev, "xMII mode %d not supported\n", mode);
dev_err(priv->dev, "xMII interface %d not supported\n",
interface);
return -EINVAL;
}

Expand Down Expand Up @@ -1352,47 +1354,116 @@ mt7530_setup(struct dsa_switch *ds)
return 0;
}

static void mt7530_phylink_mac_config(struct dsa_switch *ds, int port,
unsigned int mode,
const struct phylink_link_state *state)
static bool
mt7530_phy_mode_supported(struct dsa_switch *ds, int port,
const struct phylink_link_state *state)
{
struct mt7530_priv *priv = ds->priv;
u32 mcr_cur, mcr_new;

switch (port) {
case 0: /* Internal phy */
case 1:
case 2:
case 3:
case 4:
case 0 ... 4: /* Internal phy */
if (state->interface != PHY_INTERFACE_MODE_GMII)
return;
return false;
break;
case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
if (priv->p5_interface == state->interface)
break;
if (!phy_interface_mode_is_rgmii(state->interface) &&
state->interface != PHY_INTERFACE_MODE_MII &&
state->interface != PHY_INTERFACE_MODE_GMII)
return;
return false;
break;
case 6: /* 1st cpu port */
if (state->interface != PHY_INTERFACE_MODE_RGMII &&
state->interface != PHY_INTERFACE_MODE_TRGMII)
return false;
break;
default:
dev_err(priv->dev, "%s: unsupported port: %i\n", __func__,
port);
return false;
}

return true;
}

static bool
mt753x_phy_mode_supported(struct dsa_switch *ds, int port,
const struct phylink_link_state *state)
{
struct mt7530_priv *priv = ds->priv;

return priv->info->phy_mode_supported(ds, port, state);
}

static int
mt753x_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *state)
{
struct mt7530_priv *priv = ds->priv;

return priv->info->pad_setup(ds, state->interface);
}

static int
mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
phy_interface_t interface)
{
struct mt7530_priv *priv = ds->priv;

/* Only need to setup port5. */
if (port != 5)
return 0;

mt7530_setup_port5(priv->ds, interface);

return 0;
}

static int
mt753x_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
const struct phylink_link_state *state)
{
struct mt7530_priv *priv = ds->priv;

return priv->info->mac_port_config(ds, port, mode, state->interface);
}

static void
mt753x_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
const struct phylink_link_state *state)
{
struct mt7530_priv *priv = ds->priv;
u32 mcr_cur, mcr_new;

if (!mt753x_phy_mode_supported(ds, port, state))
goto unsupported;

switch (port) {
case 0 ... 4: /* Internal phy */
if (state->interface != PHY_INTERFACE_MODE_GMII)
goto unsupported;
break;
case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
if (priv->p5_interface == state->interface)
break;

if (mt753x_mac_config(ds, port, mode, state) < 0)
goto unsupported;

mt7530_setup_port5(ds, state->interface);
break;
case 6: /* 1st cpu port */
if (priv->p6_interface == state->interface)
break;

if (state->interface != PHY_INTERFACE_MODE_RGMII &&
state->interface != PHY_INTERFACE_MODE_TRGMII)
return;
mt753x_pad_setup(ds, state);

/* Setup TX circuit incluing relevant PAD and driving */
mt7530_pad_clk_setup(ds, state->interface);
if (mt753x_mac_config(ds, port, mode, state) < 0)
goto unsupported;

priv->p6_interface = state->interface;
break;
default:
dev_err(ds->dev, "%s: unsupported port: %i\n", __func__, port);
unsupported:
dev_err(ds->dev, "%s: unsupported %s port: %i\n",
__func__, phy_modes(state->interface), port);
return;
}

Expand Down Expand Up @@ -1456,61 +1527,44 @@ static void mt7530_phylink_mac_link_up(struct dsa_switch *ds, int port,
mt7530_set(priv, MT7530_PMCR_P(port), mcr);
}

static void mt7530_phylink_validate(struct dsa_switch *ds, int port,
unsigned long *supported,
struct phylink_link_state *state)
static void
mt7530_mac_port_validate(struct dsa_switch *ds, int port,
unsigned long *supported)
{
if (port == 5)
phylink_set(supported, 1000baseX_Full);
}

static void
mt753x_phylink_validate(struct dsa_switch *ds, int port,
unsigned long *supported,
struct phylink_link_state *state)
{
__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
struct mt7530_priv *priv = ds->priv;

switch (port) {
case 0: /* Internal phy */
case 1:
case 2:
case 3:
case 4:
if (state->interface != PHY_INTERFACE_MODE_NA &&
state->interface != PHY_INTERFACE_MODE_GMII)
goto unsupported;
break;
case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
if (state->interface != PHY_INTERFACE_MODE_NA &&
!phy_interface_mode_is_rgmii(state->interface) &&
state->interface != PHY_INTERFACE_MODE_MII &&
state->interface != PHY_INTERFACE_MODE_GMII)
goto unsupported;
break;
case 6: /* 1st cpu port */
if (state->interface != PHY_INTERFACE_MODE_NA &&
state->interface != PHY_INTERFACE_MODE_RGMII &&
state->interface != PHY_INTERFACE_MODE_TRGMII)
goto unsupported;
break;
default:
dev_err(ds->dev, "%s: unsupported port: %i\n", __func__, port);
unsupported:
if (state->interface != PHY_INTERFACE_MODE_NA &&
!mt753x_phy_mode_supported(ds, port, state)) {
linkmode_zero(supported);
return;
}

phylink_set_port_modes(mask);
phylink_set(mask, Autoneg);

if (state->interface == PHY_INTERFACE_MODE_TRGMII) {
phylink_set(mask, 1000baseT_Full);
} else {
if (state->interface != PHY_INTERFACE_MODE_TRGMII) {
phylink_set(mask, 10baseT_Half);
phylink_set(mask, 10baseT_Full);
phylink_set(mask, 100baseT_Half);
phylink_set(mask, 100baseT_Full);

if (state->interface != PHY_INTERFACE_MODE_MII) {
/* This switch only supports 1G full-duplex. */
phylink_set(mask, 1000baseT_Full);
if (port == 5)
phylink_set(mask, 1000baseX_Full);
}
phylink_set(mask, Autoneg);
}

/* This switch only supports 1G full-duplex. */
if (state->interface != PHY_INTERFACE_MODE_MII)
phylink_set(mask, 1000baseT_Full);

priv->info->mac_port_validate(ds, port, mask);

phylink_set(mask, Pause);
phylink_set(mask, Asym_Pause);

Expand Down Expand Up @@ -1558,12 +1612,45 @@ mt7530_phylink_mac_link_state(struct dsa_switch *ds, int port,
return 1;
}

static int
mt753x_phylink_mac_link_state(struct dsa_switch *ds, int port,
struct phylink_link_state *state)
{
struct mt7530_priv *priv = ds->priv;

return priv->info->mac_port_get_state(ds, port, state);
}

static int
mt753x_setup(struct dsa_switch *ds)
{
struct mt7530_priv *priv = ds->priv;

return priv->info->sw_setup(ds);
}

static int
mt753x_phy_read(struct dsa_switch *ds, int port, int regnum)
{
struct mt7530_priv *priv = ds->priv;

return priv->info->phy_read(ds, port, regnum);
}

static int
mt753x_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)
{
struct mt7530_priv *priv = ds->priv;

return priv->info->phy_write(ds, port, regnum, val);
}

static const struct dsa_switch_ops mt7530_switch_ops = {
.get_tag_protocol = mtk_get_tag_protocol,
.setup = mt7530_setup,
.setup = mt753x_setup,
.get_strings = mt7530_get_strings,
.phy_read = mt7530_phy_read,
.phy_write = mt7530_phy_write,
.phy_read = mt753x_phy_read,
.phy_write = mt753x_phy_write,
.get_ethtool_stats = mt7530_get_ethtool_stats,
.get_sset_count = mt7530_get_sset_count,
.port_enable = mt7530_port_enable,
Expand All @@ -1580,16 +1667,41 @@ static const struct dsa_switch_ops mt7530_switch_ops = {
.port_vlan_del = mt7530_port_vlan_del,
.port_mirror_add = mt7530_port_mirror_add,
.port_mirror_del = mt7530_port_mirror_del,
.phylink_validate = mt7530_phylink_validate,
.phylink_mac_link_state = mt7530_phylink_mac_link_state,
.phylink_mac_config = mt7530_phylink_mac_config,
.phylink_validate = mt753x_phylink_validate,
.phylink_mac_link_state = mt753x_phylink_mac_link_state,
.phylink_mac_config = mt753x_phylink_mac_config,
.phylink_mac_link_down = mt7530_phylink_mac_link_down,
.phylink_mac_link_up = mt7530_phylink_mac_link_up,
};

static const struct mt753x_info mt753x_table[] = {
[ID_MT7621] = {
.id = ID_MT7621,
.sw_setup = mt7530_setup,
.phy_read = mt7530_phy_read,
.phy_write = mt7530_phy_write,
.pad_setup = mt7530_pad_clk_setup,
.phy_mode_supported = mt7530_phy_mode_supported,
.mac_port_validate = mt7530_mac_port_validate,
.mac_port_get_state = mt7530_phylink_mac_link_state,
.mac_port_config = mt7530_mac_config,
},
[ID_MT7530] = {
.id = ID_MT7530,
.sw_setup = mt7530_setup,
.phy_read = mt7530_phy_read,
.phy_write = mt7530_phy_write,
.pad_setup = mt7530_pad_clk_setup,
.phy_mode_supported = mt7530_phy_mode_supported,
.mac_port_validate = mt7530_mac_port_validate,
.mac_port_get_state = mt7530_phylink_mac_link_state,
.mac_port_config = mt7530_mac_config,
},
};

static const struct of_device_id mt7530_of_match[] = {
{ .compatible = "mediatek,mt7621", .data = (void *)ID_MT7621, },
{ .compatible = "mediatek,mt7530", .data = (void *)ID_MT7530, },
{ .compatible = "mediatek,mt7621", .data = &mt753x_table[ID_MT7621], },
{ .compatible = "mediatek,mt7530", .data = &mt753x_table[ID_MT7530], },
{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(of, mt7530_of_match);
Expand Down Expand Up @@ -1630,8 +1742,21 @@ mt7530_probe(struct mdio_device *mdiodev)
/* Get the hardware identifier from the devicetree node.
* We will need it for some of the clock and regulator setup.
*/
priv->id = (unsigned int)(unsigned long)
of_device_get_match_data(&mdiodev->dev);
priv->info = of_device_get_match_data(&mdiodev->dev);
if (!priv->info)
return -EINVAL;

/* Sanity check if these required device operations are filled
* properly.
*/
if (!priv->info->sw_setup || !priv->info->pad_setup ||
!priv->info->phy_read || !priv->info->phy_write ||
!priv->info->phy_mode_supported ||
!priv->info->mac_port_validate ||
!priv->info->mac_port_get_state || !priv->info->mac_port_config)
return -EINVAL;

priv->id = priv->info->id;

if (priv->id == ID_MT7530) {
priv->core_pwr = devm_regulator_get(&mdiodev->dev, "core");
Expand Down
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