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arm64: dts: freescale: Add support for phyBOARD-Pollux-i.MX8MP
Add initial support for phyBOARD-Pollux-i.MX8MP. Supported basic features: * eMMC * i2c EEPROM * i2c RTC * i2c LED * PMIC * debug UART * SD card * 1Gbit Ethernet (fec) * watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Teresa Remmet
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Shawn Guo
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Jan 11, 2021
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arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
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| // SPDX-License-Identifier: GPL-2.0 | ||
| /* | ||
| * Copyright (C) 2020 PHYTEC Messtechnik GmbH | ||
| * Author: Teresa Remmet <t.remmet@phytec.de> | ||
| */ | ||
|
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| /dts-v1/; | ||
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| #include <dt-bindings/leds/leds-pca9532.h> | ||
| #include <dt-bindings/pwm/pwm.h> | ||
| #include "imx8mp-phycore-som.dtsi" | ||
|
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||
| / { | ||
| model = "PHYTEC phyBOARD-Pollux i.MX8MP"; | ||
| compatible = "phytec,imx8mp-phyboard-pollux-rdk", | ||
| "phytec,imx8mp-phycore-som", "fsl,imx8mp"; | ||
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| chosen { | ||
| stdout-path = &uart2; | ||
| }; | ||
|
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| reg_usdhc2_vmmc: regulator-usdhc2 { | ||
| compatible = "regulator-fixed"; | ||
| pinctrl-names = "default"; | ||
| pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; | ||
| regulator-name = "VSD_3V3"; | ||
| regulator-min-microvolt = <3300000>; | ||
| regulator-max-microvolt = <3300000>; | ||
| gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; | ||
| enable-active-high; | ||
| startup-delay-us = <100>; | ||
| off-on-delay-us = <12000>; | ||
| }; | ||
| }; | ||
|
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||
| &i2c2 { | ||
| clock-frequency = <400000>; | ||
| pinctrl-names = "default"; | ||
| pinctrl-0 = <&pinctrl_i2c2>; | ||
| pinctrl-1 = <&pinctrl_i2c2_gpio>; | ||
| sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; | ||
| scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; | ||
| status = "okay"; | ||
|
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| eeprom@51 { | ||
| compatible = "atmel,24c02"; | ||
| reg = <0x51>; | ||
| pagesize = <16>; | ||
| }; | ||
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| leds@62 { | ||
| compatible = "nxp,pca9533"; | ||
| reg = <0x62>; | ||
|
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| led1 { | ||
| type = <PCA9532_TYPE_LED>; | ||
| }; | ||
|
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| led2 { | ||
| type = <PCA9532_TYPE_LED>; | ||
| }; | ||
|
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| led3 { | ||
| type = <PCA9532_TYPE_LED>; | ||
| }; | ||
| }; | ||
| }; | ||
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| &snvs_pwrkey { | ||
| status = "okay"; | ||
| }; | ||
|
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| /* debug console */ | ||
| &uart2 { | ||
| pinctrl-names = "default"; | ||
| pinctrl-0 = <&pinctrl_uart2>; | ||
| status = "okay"; | ||
| }; | ||
|
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| /* SD-Card */ | ||
| &usdhc2 { | ||
| pinctrl-names = "default", "state_100mhz", "state_200mhz"; | ||
| pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_pins>; | ||
| pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_pins>; | ||
| pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_pins>; | ||
| cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; | ||
| vmmc-supply = <®_usdhc2_vmmc>; | ||
| bus-width = <4>; | ||
| status = "okay"; | ||
| }; | ||
|
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| &iomuxc { | ||
| pinctrl_i2c2: i2c2grp { | ||
| fsl,pins = < | ||
| MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c3 | ||
| MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c3 | ||
| >; | ||
| }; | ||
|
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| pinctrl_i2c2_gpio: i2c2gpiogrp { | ||
| fsl,pins = < | ||
| MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16 0x1e3 | ||
| MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17 0x1e3 | ||
| >; | ||
| }; | ||
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| pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { | ||
| fsl,pins = < | ||
| MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x41 | ||
| >; | ||
| }; | ||
|
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| pinctrl_uart2: uart2grp { | ||
| fsl,pins = < | ||
| MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x49 | ||
| MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x49 | ||
| >; | ||
| }; | ||
|
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||
| pinctrl_usdhc2_pins: usdhc2-gpiogrp { | ||
| fsl,pins = < | ||
| MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4 | ||
| >; | ||
| }; | ||
|
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| pinctrl_usdhc2: usdhc2grp { | ||
| fsl,pins = < | ||
| MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190 | ||
| MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0 | ||
| MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0 | ||
| MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0 | ||
| MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0 | ||
| MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0 | ||
| MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 | ||
| >; | ||
| }; | ||
|
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| pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { | ||
| fsl,pins = < | ||
| MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194 | ||
| MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4 | ||
| MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4 | ||
| MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4 | ||
| MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4 | ||
| MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4 | ||
| MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 | ||
| >; | ||
| }; | ||
|
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||
| pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { | ||
| fsl,pins = < | ||
| MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196 | ||
| MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6 | ||
| MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6 | ||
| MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6 | ||
| MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6 | ||
| MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6 | ||
| MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 | ||
| >; | ||
| }; | ||
| }; |
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