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irqchip: mips-gic: Configure EIC when CPUs come online
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Rather than configuring EIC mode for all CPUs during boot, configure it
locally on each when they come online. This will become important with
multi-cluster support, since clusters may be powered on & off (for
example via hotplug) and would lose the EIC configuration when powered
off.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Paul Burton authored and Marc Zyngier committed Nov 2, 2017
1 parent 25ac19e commit 890f6b5
Showing 1 changed file with 5 additions and 7 deletions.
12 changes: 5 additions & 7 deletions drivers/irqchip/irq-mips-gic.c
Original file line number Diff line number Diff line change
Expand Up @@ -655,6 +655,10 @@ static const struct irq_domain_ops gic_ipi_domain_ops = {

static int gic_cpu_startup(unsigned int cpu)
{
/* Enable or disable EIC */
change_gic_vl_ctl(GIC_VX_CTL_EIC,
cpu_has_veic ? GIC_VX_CTL_EIC : 0);

/* Clear all local IRQ masks (ie. disable all local interrupts) */
write_gic_vl_rmask(~0);

Expand All @@ -667,7 +671,7 @@ static int gic_cpu_startup(unsigned int cpu)
static int __init gic_of_init(struct device_node *node,
struct device_node *parent)
{
unsigned int cpu_vec, i, gicconfig, cpu, v[2];
unsigned int cpu_vec, i, gicconfig, v[2];
unsigned long reserved;
phys_addr_t gic_base;
struct resource res;
Expand Down Expand Up @@ -722,12 +726,6 @@ static int __init gic_of_init(struct device_node *node,
gic_vpes = gic_vpes + 1;

if (cpu_has_veic) {
/* Set EIC mode for all VPEs */
for_each_present_cpu(cpu) {
write_gic_vl_other(mips_cm_vp_id(cpu));
write_gic_vo_ctl(GIC_VX_CTL_EIC);
}

/* Always use vector 1 in EIC mode */
gic_cpu_pin = 0;
timer_cpu_pin = gic_cpu_pin;
Expand Down

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