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iommu/vt-d: Avoid unnecessary cache flush in pasid entry teardown
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When a present pasid entry is disassembled, all kinds of pasid related
caches need to be flushed. But when a pasid entry is not being used
(PRESENT bit not set), we don't need to do this. Check the PRESENT bit
in intel_pasid_tear_down_entry() and avoid flushing caches if it's not
set.

Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Link: https://lore.kernel.org/r/20210320025415.641201-6-baolu.lu@linux.intel.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
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Lu Baolu authored and Joerg Roedel committed Apr 7, 2021
1 parent c0474a6 commit 8b74b6a
Showing 1 changed file with 3 additions and 0 deletions.
3 changes: 3 additions & 0 deletions drivers/iommu/intel/pasid.c
Original file line number Diff line number Diff line change
Expand Up @@ -517,6 +517,9 @@ void intel_pasid_tear_down_entry(struct intel_iommu *iommu, struct device *dev,
if (WARN_ON(!pte))
return;

if (!(pte->val[0] & PASID_PTE_PRESENT))
return;

did = pasid_get_domain_id(pte);
intel_pasid_clear_entry(dev, pasid, fault_ignore);

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