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arm64: dts: Update cache properties for socionext
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The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).

Update the Device Trees accordingly.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20221107155825.1644604-21-pierre.gondois@arm.com
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231020195022.4183862-2-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Pierre Gondois authored and Arnd Bergmann committed Oct 23, 2023
1 parent 23b336e commit 8d4f914
Showing 3 changed files with 4 additions and 0 deletions.
1 change: 1 addition & 0 deletions arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
Original file line number Diff line number Diff line change
@@ -52,6 +52,7 @@

l2: l2-cache {
compatible = "cache";
cache-level = <2>;
};
};

2 changes: 2 additions & 0 deletions arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
Original file line number Diff line number Diff line change
@@ -86,10 +86,12 @@

a72_l2: l2-cache0 {
compatible = "cache";
cache-level = <2>;
};

a53_l2: l2-cache1 {
compatible = "cache";
cache-level = <2>;
};
};

1 change: 1 addition & 0 deletions arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
Original file line number Diff line number Diff line change
@@ -83,6 +83,7 @@

l2: l2-cache {
compatible = "cache";
cache-level = <2>;
};
};

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