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drm/i915: Remove cs based page flip support.
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With mmio flips now available on all platforms it's time to remove
support for cs flips.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463490484-19540-13-git-send-email-maarten.lankhorst@linux.intel.com
Reviewed-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
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Maarten Lankhorst committed May 19, 2016
1 parent 143f73b commit 8dd634d
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Showing 4 changed files with 33 additions and 507 deletions.
19 changes: 2 additions & 17 deletions drivers/gpu/drm/i915/i915_debugfs.c
Original file line number Diff line number Diff line change
Expand Up @@ -599,7 +599,6 @@ static void i915_dump_pageflip(struct seq_file *m,
{
const char pipe = pipe_name(crtc->pipe);
u32 pending;
u32 addr;
int i;

pending = atomic_read(&work->pending);
Expand All @@ -611,7 +610,6 @@ static void i915_dump_pageflip(struct seq_file *m,
pipe, plane_name(crtc->plane));
}


for (i = 0; i < work->num_planes; i++) {
struct intel_plane_state *old_plane_state = work->old_plane_state[i];
struct drm_plane *plane = old_plane_state->base.plane;
Expand All @@ -635,22 +633,9 @@ static void i915_dump_pageflip(struct seq_file *m,
i915_gem_request_completed(req, true));
}

seq_printf(m, "Flip queued on frame %d, (was ready on frame %d), now %d\n",
work->flip_queued_vblank,
work->flip_ready_vblank,
seq_printf(m, "Flip queued on frame %d, now %d\n",
pending ? work->flip_queued_vblank : -1,
intel_crtc_get_vblank_counter(crtc));
seq_printf(m, "%d prepares\n", atomic_read(&work->pending));

if (INTEL_INFO(dev_priv)->gen >= 4)
addr = I915_HI_DISPBASE(I915_READ(DSPSURF(crtc->plane)));
else
addr = I915_READ(DSPADDR(crtc->plane));
seq_printf(m, "Current scanout address 0x%08x\n", addr);

if (work->flip_queued_req) {
seq_printf(m, "New framebuffer address 0x%08lx\n", (long)work->gtt_offset);
seq_printf(m, "MMIO update completed? %d\n", addr == work->gtt_offset);
}
}

static int i915_gem_pageflip_info(struct seq_file *m, void *data)
Expand Down
120 changes: 22 additions & 98 deletions drivers/gpu/drm/i915/i915_irq.c
Original file line number Diff line number Diff line change
Expand Up @@ -136,6 +136,12 @@ static const u32 hpd_bxt[HPD_NUM_PINS] = {
POSTING_READ(type##IIR); \
} while (0)

static void
intel_finish_page_flip_cs(struct drm_i915_private *dev_priv, unsigned pipe)
{
DRM_DEBUG_KMS("Finished page flip\n");
}

/*
* We should clear IMR at preinstall/uninstall, and just check at postinstall.
*/
Expand Down Expand Up @@ -1631,16 +1637,11 @@ static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv, u32 pm_iir)
}
}

static bool intel_pipe_handle_vblank(struct drm_i915_private *dev_priv,
static void intel_pipe_handle_vblank(struct drm_i915_private *dev_priv,
enum pipe pipe)
{
bool ret;

ret = drm_handle_vblank(dev_priv->dev, pipe);
if (ret)
if (drm_handle_vblank(dev_priv->dev, pipe))
intel_finish_page_flip_mmio(dev_priv, pipe);

return ret;
}

static void valleyview_pipestat_irq_ack(struct drm_i915_private *dev_priv,
Expand Down Expand Up @@ -1707,9 +1708,8 @@ static void valleyview_pipestat_irq_handler(struct drm_i915_private *dev_priv,
enum pipe pipe;

for_each_pipe(dev_priv, pipe) {
if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS &&
intel_pipe_handle_vblank(dev_priv, pipe))
intel_check_page_flip(dev_priv, pipe);
if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS)
intel_pipe_handle_vblank(dev_priv, pipe);

if (pipe_stats[pipe] & PLANE_FLIP_DONE_INT_STATUS_VLV)
intel_finish_page_flip_cs(dev_priv, pipe);
Expand Down Expand Up @@ -2155,9 +2155,8 @@ static void ilk_display_irq_handler(struct drm_i915_private *dev_priv,
DRM_ERROR("Poison interrupt\n");

for_each_pipe(dev_priv, pipe) {
if (de_iir & DE_PIPE_VBLANK(pipe) &&
intel_pipe_handle_vblank(dev_priv, pipe))
intel_check_page_flip(dev_priv, pipe);
if (de_iir & DE_PIPE_VBLANK(pipe))
intel_pipe_handle_vblank(dev_priv, pipe);

if (de_iir & DE_PIPE_FIFO_UNDERRUN(pipe))
intel_cpu_fifo_underrun_irq_handler(dev_priv, pipe);
Expand Down Expand Up @@ -2206,9 +2205,8 @@ static void ivb_display_irq_handler(struct drm_i915_private *dev_priv,
intel_opregion_asle_intr(dev_priv);

for_each_pipe(dev_priv, pipe) {
if (de_iir & (DE_PIPE_VBLANK_IVB(pipe)) &&
intel_pipe_handle_vblank(dev_priv, pipe))
intel_check_page_flip(dev_priv, pipe);
if (de_iir & (DE_PIPE_VBLANK_IVB(pipe)))
intel_pipe_handle_vblank(dev_priv, pipe);

/* plane/pipes map 1:1 on ilk+ */
if (de_iir & DE_PLANE_FLIP_DONE_IVB(pipe))
Expand Down Expand Up @@ -2407,9 +2405,8 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
ret = IRQ_HANDLED;
I915_WRITE(GEN8_DE_PIPE_IIR(pipe), iir);

if (iir & GEN8_PIPE_VBLANK &&
intel_pipe_handle_vblank(dev_priv, pipe))
intel_check_page_flip(dev_priv, pipe);
if (iir & GEN8_PIPE_VBLANK)
intel_pipe_handle_vblank(dev_priv, pipe);

flip_done = iir;
if (INTEL_INFO(dev_priv)->gen >= 9)
Expand Down Expand Up @@ -3973,37 +3970,6 @@ static int i8xx_irq_postinstall(struct drm_device *dev)
return 0;
}

/*
* Returns true when a page flip has completed.
*/
static bool i8xx_handle_vblank(struct drm_i915_private *dev_priv,
int plane, int pipe, u32 iir)
{
u16 flip_pending = DISPLAY_PLANE_FLIP_PENDING(plane);

if (!intel_pipe_handle_vblank(dev_priv, pipe))
return false;

if ((iir & flip_pending) == 0)
goto check_page_flip;

/* We detect FlipDone by looking for the change in PendingFlip from '1'
* to '0' on the following vblank, i.e. IIR has the Pendingflip
* asserted following the MI_DISPLAY_FLIP, but ISR is deasserted, hence
* the flip is completed (no longer pending). Since this doesn't raise
* an interrupt per se, we watch for the change at vblank.
*/
if (I915_READ16(ISR) & flip_pending)
goto check_page_flip;

intel_finish_page_flip_cs(dev_priv, pipe);
return true;

check_page_flip:
intel_check_page_flip(dev_priv, pipe);
return false;
}

static irqreturn_t i8xx_irq_handler(int irq, void *arg)
{
struct drm_device *dev = arg;
Expand Down Expand Up @@ -4056,13 +4022,8 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg)
notify_ring(&dev_priv->engine[RCS]);

for_each_pipe(dev_priv, pipe) {
int plane = pipe;
if (HAS_FBC(dev_priv))
plane = !plane;

if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS &&
i8xx_handle_vblank(dev_priv, plane, pipe, iir))
flip_mask &= ~DISPLAY_PLANE_FLIP_PENDING(plane);
if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS)
intel_pipe_handle_vblank(dev_priv, pipe);

if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)
i9xx_pipe_crc_irq_handler(dev_priv, pipe);
Expand Down Expand Up @@ -4162,37 +4123,6 @@ static int i915_irq_postinstall(struct drm_device *dev)
return 0;
}

/*
* Returns true when a page flip has completed.
*/
static bool i915_handle_vblank(struct drm_i915_private *dev_priv,
int plane, int pipe, u32 iir)
{
u32 flip_pending = DISPLAY_PLANE_FLIP_PENDING(plane);

if (!intel_pipe_handle_vblank(dev_priv, pipe))
return false;

if ((iir & flip_pending) == 0)
goto check_page_flip;

/* We detect FlipDone by looking for the change in PendingFlip from '1'
* to '0' on the following vblank, i.e. IIR has the Pendingflip
* asserted following the MI_DISPLAY_FLIP, but ISR is deasserted, hence
* the flip is completed (no longer pending). Since this doesn't raise
* an interrupt per se, we watch for the change at vblank.
*/
if (I915_READ(ISR) & flip_pending)
goto check_page_flip;

intel_finish_page_flip_cs(dev_priv, pipe);
return true;

check_page_flip:
intel_check_page_flip(dev_priv, pipe);
return false;
}

static irqreturn_t i915_irq_handler(int irq, void *arg)
{
struct drm_device *dev = arg;
Expand Down Expand Up @@ -4253,13 +4183,8 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
notify_ring(&dev_priv->engine[RCS]);

for_each_pipe(dev_priv, pipe) {
int plane = pipe;
if (HAS_FBC(dev_priv))
plane = !plane;

if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS &&
i915_handle_vblank(dev_priv, plane, pipe, iir))
flip_mask &= ~DISPLAY_PLANE_FLIP_PENDING(plane);
if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS)
intel_pipe_handle_vblank(dev_priv, pipe);

if (pipe_stats[pipe] & PIPE_LEGACY_BLC_EVENT_STATUS)
blc_event = true;
Expand Down Expand Up @@ -4487,9 +4412,8 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
notify_ring(&dev_priv->engine[VCS]);

for_each_pipe(dev_priv, pipe) {
if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS &&
i915_handle_vblank(dev_priv, pipe, pipe, iir))
flip_mask &= ~DISPLAY_PLANE_FLIP_PENDING(pipe);
if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS)
intel_pipe_handle_vblank(dev_priv, pipe);

if (pipe_stats[pipe] & PIPE_LEGACY_BLC_EVENT_STATUS)
blc_event = true;
Expand Down
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