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net: airoha: fix PSE memory configuration in airoha_fe_pse_ports_init()
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Align PSE memory configuration to vendor SDK. In particular, increase
initial value of PSE reserved memory in airoha_fe_pse_ports_init()
routine by the value used for the second Packet Processor Engine (PPE2)
and do not overwrite the default value.

Introduced by commit 23020f0 ("net: airoha: Introduce ethernet support
for EN7581 SoC")

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/20241001-airoha-eth-pse-fix-v2-2-9a56cdffd074@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Lorenzo Bianconi authored and Jakub Kicinski committed Oct 4, 2024
1 parent 1f3e7ff commit 8e38e08
Showing 1 changed file with 4 additions and 2 deletions.
6 changes: 4 additions & 2 deletions drivers/net/ethernet/mediatek/airoha_eth.c
Original file line number Diff line number Diff line change
Expand Up @@ -1172,11 +1172,13 @@ static void airoha_fe_pse_ports_init(struct airoha_eth *eth)
[FE_PSE_PORT_GDM4] = 2,
[FE_PSE_PORT_CDM5] = 2,
};
u32 all_rsv;
int q;

all_rsv = airoha_fe_get_pse_all_rsv(eth);
/* hw misses PPE2 oq rsv */
airoha_fe_set(eth, REG_FE_PSE_BUF_SET,
PSE_RSV_PAGES * pse_port_num_queues[FE_PSE_PORT_PPE2]);
all_rsv += PSE_RSV_PAGES * pse_port_num_queues[FE_PSE_PORT_PPE2];
airoha_fe_set(eth, REG_FE_PSE_BUF_SET, all_rsv);

/* CMD1 */
for (q = 0; q < pse_port_num_queues[FE_PSE_PORT_CDM1]; q++)
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