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perf vendor events arm64: Add more common and uarch events
Add the following events.[1] Common architectural events: - L2I_TLB_REFILL - L2I_TLB - SIMD_INST_RETIRED - SVE_INST_RETIRED Common microarchitectural events: - UOP_SPEC - SVE_MATH_SPEC - FP_SPEC - FP_FMA_SPEC - FP_RECPE_SPEC - FP_CVT_SPEC - ASE_SVE_INT_SPEC - SVE_PRED_SPEC - SVE_MOVPRFX_SPEC - SVE_MOVPRFX_U_SPEC - ASE_SVE_LD_SPEC - ASE_SVE_ST_SPEC - PRF_SPEC - BASE_LD_REG_SPEC - BASE_ST_REG_SPEC - SVE_LDR_REG_SPEC - SVE_STR_REG_SPEC - SVE_LDR_PREG_SPEC - SVE_STR_PREG_SPEC - SVE_PRF_CONTIG_SPEC - ASE_SVE_LD_MULTI_SPEC - ASE_SVE_ST_MULTI_SPEC - SVE_LD_GATHER_SPEC - SVE_ST_SCATTER_SPEC - SVE_PRF_GATHER_SPEC - SVE_LDFF_SPEC - FP_SCALE_OPS_SPEC - FP_FIXED_OPS_SPEC - FP_HP_SCALE_OPS_SPEC - FP_HP_FIXED_OPS_SPEC - FP_SP_SCALE_OPS_SPEC - FP_SP_FIXED_OPS_SPEC - FP_DP_SCALE_OPS_SPEC - FP_DP_FIXED_OPS_SPEC Reference document is at the following: [1] https://github.com/fujitsu/A64FX/blob/master/doc/A64FX_PMU_Events_v1.2.pdf Signed-off-by: Nakamura, Shunsuke/中村 俊介 <nakamura.shun@fujitsu.com> Reviewed-by: John Garry <john.garry@huawei.com> Tested-by: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: http://lore.kernel.org/lkml/20210308105342.746940-2-nakamura.shun@fujitsu.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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Shunsuke Nakamura
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Arnaldo Carvalho de Melo
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Mar 15, 2021
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