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arm64: dts: renesas: r8a77990: Create thermal zone to support IPA
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Setup a thermal zone driven by SoC temperature sensor.
Create passive trip points and bind them to CPUFreq cooling
device that supports power extension.

In R-Car Gen3, IPA is supported for only one channel
Reason:
  Currently, IPA controls base on only CPU temperature.
  And only one thermal channel is assembled closest
  CPU cores is selected as target of IPA.
  If other channels are used, IPA controlling is not properly.

A single cooling device is described for all A53 CPUs as this
reflects that physically there is only one cooling device present.

This patch improves on an earlier version by:

* Omitting cooling-max-level and cooling-min-level properties which
  are no longer present in mainline as of v4.17
* Removing an unused trip-point0 node sub-property from the trips
  property.
* Defers adding dynamic-power-coefficient properties to a separate patch as
  these are properties of the CPU.

The long signed-off by chain below reflects many revisions, mainly
internal, that this patch has been through.

Signed-off-by: Dien Pham <dien.pham.ry@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Dien Pham authored and Simon Horman committed Jun 6, 2019
1 parent eb2cd8c commit 8fa7d18
Showing 1 changed file with 16 additions and 3 deletions.
19 changes: 16 additions & 3 deletions arch/arm64/boot/dts/renesas/r8a77990.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -84,6 +84,7 @@
compatible = "arm,cortex-a53";
reg = <0>;
device_type = "cpu";
#cooling-cells = <2>;
power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
next-level-cache = <&L2_CA53>;
enable-method = "psci";
Expand Down Expand Up @@ -1856,18 +1857,30 @@
thermal-zones {
cpu-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&thermal>;
polling-delay = <0>;
thermal-sensors = <&thermal 0>;
sustainable-power = <717>;

trips {
cpu-crit {
target: trip-point1 {
temperature = <100000>;
hysteresis = <2000>;
type = "passive";
};

sensor1_crit: sensor1-crit {
temperature = <120000>;
hysteresis = <2000>;
type = "critical";
};
};

cooling-maps {
map0 {
trip = <&target>;
cooling-device = <&a53_0 0 2>;
contribution = <1024>;
};
};
};
};
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