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MIPS: Set io_map_base for several PCI bridges lacking it
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Several MIPS platforms don't set pci_controller::io_map_base for their
PCI bridges.  This results in a panic in pci_iomap().  (The panic is
conditional on CONFIG_PCI_DOMAINS, but that is now enabled for all PCI
MIPS systems.)

Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Cc: linux-mips@linux-mips.org
Cc: Martin Michlmayr <tbm@cyrius.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: 584784@bugs.debian.org
Patchwork: https://patchwork.linux-mips.org/patch/1377/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ben Hutchings authored and Ralf Baechle committed Jul 26, 2010
1 parent 0d5977d commit 8faf2e6
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Showing 5 changed files with 6 additions and 1 deletion.
2 changes: 2 additions & 0 deletions arch/mips/mti-malta/malta-pci.c
Original file line number Diff line number Diff line change
Expand Up @@ -247,6 +247,8 @@ void __init mips_pcibios_init(void)
iomem_resource.end &= 0xfffffffffULL; /* 64 GB */
ioport_resource.end = controller->io_resource->end;

controller->io_map_base = mips_io_port_base;

register_pci_controller(controller);
}

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1 change: 1 addition & 0 deletions arch/mips/nxp/pnx8550/common/pci.c
Original file line number Diff line number Diff line change
Expand Up @@ -44,6 +44,7 @@ extern struct pci_ops pnx8550_pci_ops;

static struct pci_controller pnx8550_controller = {
.pci_ops = &pnx8550_pci_ops,
.io_map_base = PNX8550_PORT_BASE,
.io_resource = &pci_io_resource,
.mem_resource = &pci_mem_resource,
};
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2 changes: 1 addition & 1 deletion arch/mips/nxp/pnx8550/common/setup.c
Original file line number Diff line number Diff line change
Expand Up @@ -113,7 +113,7 @@ void __init plat_mem_setup(void)
PNX8550_GLB2_ENAB_INTA_O = 0;

/* IO/MEM resources. */
set_io_port_base(KSEG1);
set_io_port_base(PNX8550_PORT_BASE);
ioport_resource.start = 0;
ioport_resource.end = ~0;
iomem_resource.start = 0;
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1 change: 1 addition & 0 deletions arch/mips/pci/ops-pmcmsp.c
Original file line number Diff line number Diff line change
Expand Up @@ -944,6 +944,7 @@ static struct pci_controller msp_pci_controller = {
.pci_ops = &msp_pci_ops,
.mem_resource = &pci_mem_resource,
.mem_offset = 0,
.io_map_base = MSP_PCI_IOSPACE_BASE,
.io_resource = &pci_io_resource,
.io_offset = 0
};
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1 change: 1 addition & 0 deletions arch/mips/pci/pci-yosemite.c
Original file line number Diff line number Diff line change
Expand Up @@ -54,6 +54,7 @@ static int __init pmc_yosemite_setup(void)
panic(ioremap_failed);

set_io_port_base(io_v_base);
py_controller.io_map_base = io_v_base;
TITAN_WRITE(RM9000x2_OCD_LKM7, TITAN_READ(RM9000x2_OCD_LKM7) | 1);

ioport_resource.end = TITAN_IO_SIZE - 1;
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