Skip to content

Commit

Permalink
mmc: sdhci: Change SDMA address register for v4 mode
Browse files Browse the repository at this point in the history
According to the SD host controller specification version 4.10, when
Host Version 4 is enabled, SDMA uses ADMA System Address register
(05Fh-058h) instead of using SDMA System Address register to
support both 32-bit and 64-bit addressing.

Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
  • Loading branch information
Chunyan Zhang authored and Ulf Hansson committed Oct 8, 2018
1 parent b3f80b4 commit 917a0c5
Showing 1 changed file with 20 additions and 10 deletions.
30 changes: 20 additions & 10 deletions drivers/mmc/host/sdhci.c
Original file line number Diff line number Diff line change
Expand Up @@ -736,14 +736,25 @@ static void sdhci_adma_table_post(struct sdhci_host *host,
}
}

static u32 sdhci_sdma_address(struct sdhci_host *host)
static dma_addr_t sdhci_sdma_address(struct sdhci_host *host)
{
if (host->bounce_buffer)
return host->bounce_addr;
else
return sg_dma_address(host->data->sg);
}

static void sdhci_set_sdma_addr(struct sdhci_host *host, dma_addr_t addr)
{
if (host->v4_mode) {
sdhci_writel(host, addr, SDHCI_ADMA_ADDRESS);
if (host->flags & SDHCI_USE_64_BIT_DMA)
sdhci_writel(host, (u64)addr >> 32, SDHCI_ADMA_ADDRESS_HI);
} else {
sdhci_writel(host, addr, SDHCI_DMA_ADDRESS);
}
}

static unsigned int sdhci_target_timeout(struct sdhci_host *host,
struct mmc_command *cmd,
struct mmc_data *data)
Expand Down Expand Up @@ -1003,8 +1014,7 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd)
SDHCI_ADMA_ADDRESS_HI);
} else {
WARN_ON(sg_cnt != 1);
sdhci_writel(host, sdhci_sdma_address(host),
SDHCI_DMA_ADDRESS);
sdhci_set_sdma_addr(host, sdhci_sdma_address(host));
}
}

Expand Down Expand Up @@ -2839,20 +2849,20 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
* some controllers are faulty, don't trust them.
*/
if (intmask & SDHCI_INT_DMA_END) {
u32 dmastart, dmanow;
dma_addr_t dmastart, dmanow;

dmastart = sdhci_sdma_address(host);
dmanow = dmastart + host->data->bytes_xfered;
/*
* Force update to the next DMA block boundary.
*/
dmanow = (dmanow &
~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1)) +
~((dma_addr_t)SDHCI_DEFAULT_BOUNDARY_SIZE - 1)) +
SDHCI_DEFAULT_BOUNDARY_SIZE;
host->data->bytes_xfered = dmanow - dmastart;
DBG("DMA base 0x%08x, transferred 0x%06x bytes, next 0x%08x\n",
dmastart, host->data->bytes_xfered, dmanow);
sdhci_writel(host, dmanow, SDHCI_DMA_ADDRESS);
DBG("DMA base %pad, transferred 0x%06x bytes, next %pad\n",
&dmastart, host->data->bytes_xfered, &dmanow);
sdhci_set_sdma_addr(host, dmanow);
}

if (intmask & SDHCI_INT_DATA_END) {
Expand Down Expand Up @@ -3606,8 +3616,8 @@ int sdhci_setup_host(struct sdhci_host *host)
}
}

/* SDMA does not support 64-bit DMA */
if (host->flags & SDHCI_USE_64_BIT_DMA)
/* SDMA does not support 64-bit DMA if v4 mode not set */
if ((host->flags & SDHCI_USE_64_BIT_DMA) && !host->v4_mode)
host->flags &= ~SDHCI_USE_SDMA;

if (host->flags & SDHCI_USE_ADMA) {
Expand Down

0 comments on commit 917a0c5

Please sign in to comment.