Skip to content

Commit

Permalink
drm/i915: Fix PCH PLL assertions to not assume CRTC:PLL relationship
Browse files Browse the repository at this point in the history
The existing assertions were written under the assumption that we wanted
to test the related PLL to a CRTC. With the split of PLL into a
separately managed entity which may be shared amongst CRTCs, we need to
pass in both the CRTC and the PLL to the assertion routine.
Occassionally, this means passing NULL for the CRTC as we wish to check
the status of the PLL irrespective of the current CRTC.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
  • Loading branch information
Chris Wilson authored and Daniel Vetter committed May 24, 2012
1 parent 7b9e0ae commit 92b27b0
Showing 1 changed file with 33 additions and 23 deletions.
56 changes: 33 additions & 23 deletions drivers/gpu/drm/i915/intel_display.c
Original file line number Diff line number Diff line change
Expand Up @@ -910,9 +910,10 @@ static void assert_pll(struct drm_i915_private *dev_priv,

/* For ILK+ */
static void assert_pch_pll(struct drm_i915_private *dev_priv,
struct intel_crtc *intel_crtc, bool state)
struct intel_pch_pll *pll,
struct intel_crtc *crtc,
bool state)
{
int reg;
u32 val;
bool cur_state;

Expand All @@ -921,30 +922,37 @@ static void assert_pch_pll(struct drm_i915_private *dev_priv,
return;
}

if (!intel_crtc->pch_pll) {
WARN(1, "asserting PCH PLL enabled with no PLL\n");
if (WARN (!pll,
"asserting PCH PLL %s with no PLL\n", state_string(state)))
return;
}

if (HAS_PCH_CPT(dev_priv->dev)) {
val = I915_READ(pll->pll_reg);
cur_state = !!(val & DPLL_VCO_ENABLE);
WARN(cur_state != state,
"PCH PLL state for reg %x assertion failure (expected %s, current %s), val=%08x\n",
pll->pll_reg, state_string(state), state_string(cur_state), val);

/* Make sure the selected PLL is correctly attached to the transcoder */
if (crtc && HAS_PCH_CPT(dev_priv->dev)) {
u32 pch_dpll;

pch_dpll = I915_READ(PCH_DPLL_SEL);

/* Make sure the selected PLL is enabled to the transcoder */
WARN(!((pch_dpll >> (4 * intel_crtc->pipe)) & 8),
"transcoder %d PLL not enabled\n", intel_crtc->pipe);
cur_state = pll->pll_reg == _PCH_DPLL_B;
if (!WARN(((pch_dpll >> (4 * crtc->pipe)) & 1) != cur_state,
"PLL[%d] not attached to this transcoder %d: %08x\n",
cur_state, crtc->pipe, pch_dpll)) {
cur_state = !!(val >> (4*crtc->pipe + 3));
WARN(cur_state != state,
"PLL[%d] not %s on this transcoder %d: %08x\n",
pll->pll_reg == _PCH_DPLL_B,
state_string(state),
crtc->pipe,
val);
}
}

reg = intel_crtc->pch_pll->pll_reg;
val = I915_READ(reg);
cur_state = !!(val & DPLL_VCO_ENABLE);
WARN(cur_state != state,
"PCH PLL state assertion failure (expected %s, current %s)\n",
state_string(state), state_string(cur_state));
}
#define assert_pch_pll_enabled(d, p) assert_pch_pll(d, p, true)
#define assert_pch_pll_disabled(d, p) assert_pch_pll(d, p, false)
#define assert_pch_pll_enabled(d, p, c) assert_pch_pll(d, p, c, true)
#define assert_pch_pll_disabled(d, p, c) assert_pch_pll(d, p, c, false)

static void assert_fdi_tx(struct drm_i915_private *dev_priv,
enum pipe pipe, bool state)
Expand Down Expand Up @@ -1424,7 +1432,7 @@ static void intel_enable_pch_pll(struct intel_crtc *intel_crtc)
assert_pch_refclk_enabled(dev_priv);

if (pll->active++ && pll->on) {
assert_pch_pll_enabled(dev_priv, intel_crtc);
assert_pch_pll_enabled(dev_priv, pll, NULL);
return;
}

Expand Down Expand Up @@ -1460,12 +1468,12 @@ static void intel_disable_pch_pll(struct intel_crtc *intel_crtc)
intel_crtc->base.base.id);

if (WARN_ON(pll->active == 0)) {
assert_pch_pll_disabled(dev_priv, intel_crtc);
assert_pch_pll_disabled(dev_priv, pll, NULL);
return;
}

if (--pll->active) {
assert_pch_pll_enabled(dev_priv, intel_crtc);
assert_pch_pll_enabled(dev_priv, pll, NULL);
return;
}

Expand Down Expand Up @@ -1495,7 +1503,9 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,
BUG_ON(dev_priv->info->gen < 5);

/* Make sure PCH DPLL is enabled */
assert_pch_pll_enabled(dev_priv, to_intel_crtc(crtc));
assert_pch_pll_enabled(dev_priv,
to_intel_crtc(crtc)->pch_pll,
to_intel_crtc(crtc));

/* FDI must be feeding us bits for PCH ports */
assert_fdi_tx_enabled(dev_priv, pipe);
Expand Down

0 comments on commit 92b27b0

Please sign in to comment.