Skip to content

Commit

Permalink
drm/i915: Not all mappable regions require GTT fence regions
Browse files Browse the repository at this point in the history
Combining map_and_fenceable revealed a bug in
i915_gem_object_gtt_size() in that it always computed the appropriate
fence size for the object regardless of tiling state which caused us to
over-allocate linear buffers when binding to the GTT.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
  • Loading branch information
Chris Wilson committed Nov 23, 2010
1 parent 05394f3 commit 92b88ae
Showing 1 changed file with 22 additions and 31 deletions.
53 changes: 22 additions & 31 deletions drivers/gpu/drm/i915/i915_gem.c
Original file line number Diff line number Diff line change
Expand Up @@ -41,9 +41,6 @@ struct change_domains {
uint32_t flush_rings;
};

static uint32_t i915_gem_get_gtt_alignment(struct drm_i915_gem_object *obj);
static uint32_t i915_gem_get_gtt_size(struct drm_i915_gem_object *obj);

static int i915_gem_object_flush_gpu_write_domain(struct drm_i915_gem_object *obj,
bool pipelined);
static void i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj);
Expand Down Expand Up @@ -1443,6 +1440,28 @@ i915_gem_free_mmap_offset(struct drm_i915_gem_object *obj)
list->map = NULL;
}

static uint32_t
i915_gem_get_gtt_size(struct drm_i915_gem_object *obj)
{
struct drm_device *dev = obj->base.dev;
uint32_t size;

if (INTEL_INFO(dev)->gen >= 4 ||
obj->tiling_mode == I915_TILING_NONE)
return obj->base.size;

/* Previous chips need a power-of-two fence region when tiling */
if (INTEL_INFO(dev)->gen == 3)
size = 1024*1024;
else
size = 512*1024;

while (size < obj->base.size)
size <<= 1;

return size;
}

/**
* i915_gem_get_gtt_alignment - return required GTT alignment for an object
* @obj: object to check
Expand Down Expand Up @@ -1505,34 +1524,6 @@ i915_gem_get_unfenced_gtt_alignment(struct drm_i915_gem_object *obj)
return tile_height * obj->stride * 2;
}

static uint32_t
i915_gem_get_gtt_size(struct drm_i915_gem_object *obj)
{
struct drm_device *dev = obj->base.dev;
uint32_t size;

/*
* Minimum alignment is 4k (GTT page size), but might be greater
* if a fence register is needed for the object.
*/
if (INTEL_INFO(dev)->gen >= 4)
return obj->base.size;

/*
* Previous chips need to be aligned to the size of the smallest
* fence register that can contain the object.
*/
if (INTEL_INFO(dev)->gen == 3)
size = 1024*1024;
else
size = 512*1024;

while (size < obj->base.size)
size <<= 1;

return size;
}

/**
* i915_gem_mmap_gtt_ioctl - prepare an object for GTT mmap'ing
* @dev: DRM device
Expand Down

0 comments on commit 92b88ae

Please sign in to comment.