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i2c: exynos5: rework HSI2C_MASTER_ST_LOSE state handling
HSI2C_MASTER_ST_LOSE state is not documented properly, extensive tests show that hardware is usually able to recover from this state without interrupting the transfer. Moreover documentation says that such state can be caused by slave clock stretching, and should not be treated as an error during transaction. The only place it indicates an error is just before starting transaction. In such case bus recovery procedure should be performed - master should pulse SCL line nine times and then send STOP condition, it can be repeated until SDA goes high. The procedure can be performed using manual commands HSI2C_CMD_READ_DATA and HSI2C_CMD_SEND_STOP. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Andrzej Hajda
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Wolfram Sang
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Feb 27, 2018
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