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pinctrl: samsung: Validate alias coming from DT
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Driver uses alias from Device Tree as an index of pin controller data
array.  In case of a wrong DTB or an out-of-tree DTB, the alias could be
outside of this data array leading to out-of-bounds access.

Depending on binary and memory layout, this could be handled properly
(showing error like "samsung-pinctrl 3860000.pinctrl: driver data not
available") or could lead to exceptions.

Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: <stable@vger.kernel.org>
Fixes: 30574f0 ("pinctrl: add samsung pinctrl and gpiolib driver")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Krzysztof Kozlowski authored and Linus Walleij committed Mar 8, 2018
1 parent 625504a commit 93b0bea
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Showing 6 changed files with 154 additions and 52 deletions.
56 changes: 48 additions & 8 deletions drivers/pinctrl/samsung/pinctrl-exynos-arm.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -124,7 +124,7 @@ static const struct samsung_pin_bank_data s5pv210_pin_bank[] __initconst = {
EXYNOS_PIN_BANK_EINTW(8, 0xc60, "gph3", 0x0c),
};

const struct samsung_pin_ctrl s5pv210_pin_ctrl[] __initconst = {
static const struct samsung_pin_ctrl s5pv210_pin_ctrl[] __initconst = {
{
/* pin-controller instance 0 data */
.pin_banks = s5pv210_pin_bank,
Expand All @@ -137,6 +137,11 @@ const struct samsung_pin_ctrl s5pv210_pin_ctrl[] __initconst = {
},
};

const struct samsung_pinctrl_of_match_data s5pv210_of_data __initconst = {
.ctrl = s5pv210_pin_ctrl,
.num_ctrl = ARRAY_SIZE(s5pv210_pin_ctrl),
};

/* Pad retention control code for accessing PMU regmap */
static atomic_t exynos_shared_retention_refcnt;

Expand Down Expand Up @@ -199,7 +204,7 @@ static const struct samsung_retention_data exynos3250_retention_data __initconst
* Samsung pinctrl driver data for Exynos3250 SoC. Exynos3250 SoC includes
* two gpio/pin-mux/pinconfig controllers.
*/
const struct samsung_pin_ctrl exynos3250_pin_ctrl[] __initconst = {
static const struct samsung_pin_ctrl exynos3250_pin_ctrl[] __initconst = {
{
/* pin-controller instance 0 data */
.pin_banks = exynos3250_pin_banks0,
Expand All @@ -220,6 +225,11 @@ const struct samsung_pin_ctrl exynos3250_pin_ctrl[] __initconst = {
},
};

const struct samsung_pinctrl_of_match_data exynos3250_of_data __initconst = {
.ctrl = exynos3250_pin_ctrl,
.num_ctrl = ARRAY_SIZE(exynos3250_pin_ctrl),
};

/* pin banks of exynos4210 pin-controller 0 */
static const struct samsung_pin_bank_data exynos4210_pin_banks0[] __initconst = {
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
Expand Down Expand Up @@ -303,7 +313,7 @@ static const struct samsung_retention_data exynos4_audio_retention_data __initco
* Samsung pinctrl driver data for Exynos4210 SoC. Exynos4210 SoC includes
* three gpio/pin-mux/pinconfig controllers.
*/
const struct samsung_pin_ctrl exynos4210_pin_ctrl[] __initconst = {
static const struct samsung_pin_ctrl exynos4210_pin_ctrl[] __initconst = {
{
/* pin-controller instance 0 data */
.pin_banks = exynos4210_pin_banks0,
Expand All @@ -329,6 +339,11 @@ const struct samsung_pin_ctrl exynos4210_pin_ctrl[] __initconst = {
},
};

const struct samsung_pinctrl_of_match_data exynos4210_of_data __initconst = {
.ctrl = exynos4210_pin_ctrl,
.num_ctrl = ARRAY_SIZE(exynos4210_pin_ctrl),
};

/* pin banks of exynos4x12 pin-controller 0 */
static const struct samsung_pin_bank_data exynos4x12_pin_banks0[] __initconst = {
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
Expand Down Expand Up @@ -391,7 +406,7 @@ static const struct samsung_pin_bank_data exynos4x12_pin_banks3[] __initconst =
* Samsung pinctrl driver data for Exynos4x12 SoC. Exynos4x12 SoC includes
* four gpio/pin-mux/pinconfig controllers.
*/
const struct samsung_pin_ctrl exynos4x12_pin_ctrl[] __initconst = {
static const struct samsung_pin_ctrl exynos4x12_pin_ctrl[] __initconst = {
{
/* pin-controller instance 0 data */
.pin_banks = exynos4x12_pin_banks0,
Expand Down Expand Up @@ -427,6 +442,11 @@ const struct samsung_pin_ctrl exynos4x12_pin_ctrl[] __initconst = {
},
};

const struct samsung_pinctrl_of_match_data exynos4x12_of_data __initconst = {
.ctrl = exynos4x12_pin_ctrl,
.num_ctrl = ARRAY_SIZE(exynos4x12_pin_ctrl),
};

/* pin banks of exynos5250 pin-controller 0 */
static const struct samsung_pin_bank_data exynos5250_pin_banks0[] __initconst = {
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
Expand Down Expand Up @@ -487,7 +507,7 @@ static const struct samsung_pin_bank_data exynos5250_pin_banks3[] __initconst =
* Samsung pinctrl driver data for Exynos5250 SoC. Exynos5250 SoC includes
* four gpio/pin-mux/pinconfig controllers.
*/
const struct samsung_pin_ctrl exynos5250_pin_ctrl[] __initconst = {
static const struct samsung_pin_ctrl exynos5250_pin_ctrl[] __initconst = {
{
/* pin-controller instance 0 data */
.pin_banks = exynos5250_pin_banks0,
Expand Down Expand Up @@ -523,6 +543,11 @@ const struct samsung_pin_ctrl exynos5250_pin_ctrl[] __initconst = {
},
};

const struct samsung_pinctrl_of_match_data exynos5250_of_data __initconst = {
.ctrl = exynos5250_pin_ctrl,
.num_ctrl = ARRAY_SIZE(exynos5250_pin_ctrl),
};

/* pin banks of exynos5260 pin-controller 0 */
static const struct samsung_pin_bank_data exynos5260_pin_banks0[] __initconst = {
EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpa0", 0x00),
Expand Down Expand Up @@ -567,7 +592,7 @@ static const struct samsung_pin_bank_data exynos5260_pin_banks2[] __initconst =
* Samsung pinctrl driver data for Exynos5260 SoC. Exynos5260 SoC includes
* three gpio/pin-mux/pinconfig controllers.
*/
const struct samsung_pin_ctrl exynos5260_pin_ctrl[] __initconst = {
static const struct samsung_pin_ctrl exynos5260_pin_ctrl[] __initconst = {
{
/* pin-controller instance 0 data */
.pin_banks = exynos5260_pin_banks0,
Expand All @@ -587,6 +612,11 @@ const struct samsung_pin_ctrl exynos5260_pin_ctrl[] __initconst = {
},
};

const struct samsung_pinctrl_of_match_data exynos5260_of_data __initconst = {
.ctrl = exynos5260_pin_ctrl,
.num_ctrl = ARRAY_SIZE(exynos5260_pin_ctrl),
};

/* pin banks of exynos5410 pin-controller 0 */
static const struct samsung_pin_bank_data exynos5410_pin_banks0[] __initconst = {
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
Expand Down Expand Up @@ -657,7 +687,7 @@ static const struct samsung_pin_bank_data exynos5410_pin_banks3[] __initconst =
* Samsung pinctrl driver data for Exynos5410 SoC. Exynos5410 SoC includes
* four gpio/pin-mux/pinconfig controllers.
*/
const struct samsung_pin_ctrl exynos5410_pin_ctrl[] __initconst = {
static const struct samsung_pin_ctrl exynos5410_pin_ctrl[] __initconst = {
{
/* pin-controller instance 0 data */
.pin_banks = exynos5410_pin_banks0,
Expand Down Expand Up @@ -690,6 +720,11 @@ const struct samsung_pin_ctrl exynos5410_pin_ctrl[] __initconst = {
},
};

const struct samsung_pinctrl_of_match_data exynos5410_of_data __initconst = {
.ctrl = exynos5410_pin_ctrl,
.num_ctrl = ARRAY_SIZE(exynos5410_pin_ctrl),
};

/* pin banks of exynos5420 pin-controller 0 */
static const struct samsung_pin_bank_data exynos5420_pin_banks0[] __initconst = {
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpy7", 0x00),
Expand Down Expand Up @@ -774,7 +809,7 @@ static const struct samsung_retention_data exynos5420_retention_data __initconst
* Samsung pinctrl driver data for Exynos5420 SoC. Exynos5420 SoC includes
* four gpio/pin-mux/pinconfig controllers.
*/
const struct samsung_pin_ctrl exynos5420_pin_ctrl[] __initconst = {
static const struct samsung_pin_ctrl exynos5420_pin_ctrl[] __initconst = {
{
/* pin-controller instance 0 data */
.pin_banks = exynos5420_pin_banks0,
Expand Down Expand Up @@ -808,3 +843,8 @@ const struct samsung_pin_ctrl exynos5420_pin_ctrl[] __initconst = {
.retention_data = &exynos4_audio_retention_data,
},
};

const struct samsung_pinctrl_of_match_data exynos5420_of_data __initconst = {
.ctrl = exynos5420_pin_ctrl,
.num_ctrl = ARRAY_SIZE(exynos5420_pin_ctrl),
};
14 changes: 12 additions & 2 deletions drivers/pinctrl/samsung/pinctrl-exynos-arm64.c
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Original file line number Diff line number Diff line change
Expand Up @@ -175,7 +175,7 @@ static const struct samsung_retention_data exynos5433_fsys_retention_data __init
* Samsung pinctrl driver data for Exynos5433 SoC. Exynos5433 SoC includes
* ten gpio/pin-mux/pinconfig controllers.
*/
const struct samsung_pin_ctrl exynos5433_pin_ctrl[] __initconst = {
static const struct samsung_pin_ctrl exynos5433_pin_ctrl[] __initconst = {
{
/* pin-controller instance 0 data */
.pin_banks = exynos5433_pin_banks0,
Expand Down Expand Up @@ -260,6 +260,11 @@ const struct samsung_pin_ctrl exynos5433_pin_ctrl[] __initconst = {
},
};

const struct samsung_pinctrl_of_match_data exynos5433_of_data __initconst = {
.ctrl = exynos5433_pin_ctrl,
.num_ctrl = ARRAY_SIZE(exynos5433_pin_ctrl),
};

/* pin banks of exynos7 pin-controller - ALIVE */
static const struct samsung_pin_bank_data exynos7_pin_banks0[] __initconst = {
EXYNOS_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
Expand Down Expand Up @@ -339,7 +344,7 @@ static const struct samsung_pin_bank_data exynos7_pin_banks9[] __initconst = {
EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpz1", 0x04),
};

const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
static const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
{
/* pin-controller instance 0 Alive data */
.pin_banks = exynos7_pin_banks0,
Expand Down Expand Up @@ -392,3 +397,8 @@ const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
.eint_gpio_init = exynos_eint_gpio_init,
},
};

const struct samsung_pinctrl_of_match_data exynos7_of_data __initconst = {
.ctrl = exynos7_pin_ctrl,
.num_ctrl = ARRAY_SIZE(exynos7_pin_ctrl),
};
28 changes: 24 additions & 4 deletions drivers/pinctrl/samsung/pinctrl-s3c24xx.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -565,14 +565,19 @@ static const struct samsung_pin_bank_data s3c2412_pin_banks[] __initconst = {
PIN_BANK_2BIT(13, 0x080, "gpj"),
};

const struct samsung_pin_ctrl s3c2412_pin_ctrl[] __initconst = {
static const struct samsung_pin_ctrl s3c2412_pin_ctrl[] __initconst = {
{
.pin_banks = s3c2412_pin_banks,
.nr_banks = ARRAY_SIZE(s3c2412_pin_banks),
.eint_wkup_init = s3c24xx_eint_init,
},
};

const struct samsung_pinctrl_of_match_data s3c2412_of_data __initconst = {
.ctrl = s3c2412_pin_ctrl,
.num_ctrl = ARRAY_SIZE(s3c2412_pin_ctrl),
};

static const struct samsung_pin_bank_data s3c2416_pin_banks[] __initconst = {
PIN_BANK_A(27, 0x000, "gpa"),
PIN_BANK_2BIT(11, 0x010, "gpb"),
Expand All @@ -587,14 +592,19 @@ static const struct samsung_pin_bank_data s3c2416_pin_banks[] __initconst = {
PIN_BANK_2BIT(2, 0x100, "gpm"),
};

const struct samsung_pin_ctrl s3c2416_pin_ctrl[] __initconst = {
static const struct samsung_pin_ctrl s3c2416_pin_ctrl[] __initconst = {
{
.pin_banks = s3c2416_pin_banks,
.nr_banks = ARRAY_SIZE(s3c2416_pin_banks),
.eint_wkup_init = s3c24xx_eint_init,
},
};

const struct samsung_pinctrl_of_match_data s3c2416_of_data __initconst = {
.ctrl = s3c2416_pin_ctrl,
.num_ctrl = ARRAY_SIZE(s3c2416_pin_ctrl),
};

static const struct samsung_pin_bank_data s3c2440_pin_banks[] __initconst = {
PIN_BANK_A(25, 0x000, "gpa"),
PIN_BANK_2BIT(11, 0x010, "gpb"),
Expand All @@ -607,14 +617,19 @@ static const struct samsung_pin_bank_data s3c2440_pin_banks[] __initconst = {
PIN_BANK_2BIT(13, 0x0d0, "gpj"),
};

const struct samsung_pin_ctrl s3c2440_pin_ctrl[] __initconst = {
static const struct samsung_pin_ctrl s3c2440_pin_ctrl[] __initconst = {
{
.pin_banks = s3c2440_pin_banks,
.nr_banks = ARRAY_SIZE(s3c2440_pin_banks),
.eint_wkup_init = s3c24xx_eint_init,
},
};

const struct samsung_pinctrl_of_match_data s3c2440_of_data __initconst = {
.ctrl = s3c2440_pin_ctrl,
.num_ctrl = ARRAY_SIZE(s3c2440_pin_ctrl),
};

static const struct samsung_pin_bank_data s3c2450_pin_banks[] __initconst = {
PIN_BANK_A(28, 0x000, "gpa"),
PIN_BANK_2BIT(11, 0x010, "gpb"),
Expand All @@ -630,10 +645,15 @@ static const struct samsung_pin_bank_data s3c2450_pin_banks[] __initconst = {
PIN_BANK_2BIT(2, 0x100, "gpm"),
};

const struct samsung_pin_ctrl s3c2450_pin_ctrl[] __initconst = {
static const struct samsung_pin_ctrl s3c2450_pin_ctrl[] __initconst = {
{
.pin_banks = s3c2450_pin_banks,
.nr_banks = ARRAY_SIZE(s3c2450_pin_banks),
.eint_wkup_init = s3c24xx_eint_init,
},
};

const struct samsung_pinctrl_of_match_data s3c2450_of_data __initconst = {
.ctrl = s3c2450_pin_ctrl,
.num_ctrl = ARRAY_SIZE(s3c2450_pin_ctrl),
};
7 changes: 6 additions & 1 deletion drivers/pinctrl/samsung/pinctrl-s3c64xx.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -789,7 +789,7 @@ static const struct samsung_pin_bank_data s3c64xx_pin_banks0[] __initconst = {
* Samsung pinctrl driver data for S3C64xx SoC. S3C64xx SoC includes
* one gpio/pin-mux/pinconfig controller.
*/
const struct samsung_pin_ctrl s3c64xx_pin_ctrl[] __initconst = {
static const struct samsung_pin_ctrl s3c64xx_pin_ctrl[] __initconst = {
{
/* pin-controller instance 1 data */
.pin_banks = s3c64xx_pin_banks0,
Expand All @@ -798,3 +798,8 @@ const struct samsung_pin_ctrl s3c64xx_pin_ctrl[] __initconst = {
.eint_wkup_init = s3c64xx_eint_eint0_init,
},
};

const struct samsung_pinctrl_of_match_data s3c64xx_of_data __initconst = {
.ctrl = s3c64xx_pin_ctrl,
.num_ctrl = ARRAY_SIZE(s3c64xx_pin_ctrl),
};
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