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What: /sys/class/scsi_host/hostX/isci_id | ||
Date: June 2011 | ||
Contact: Dave Jiang <dave.jiang@intel.com> | ||
Description: | ||
This file contains the enumerated host ID for the Intel | ||
SCU controller. The Intel(R) C600 Series Chipset SATA/SAS | ||
Storage Control Unit embeds up to two 4-port controllers in | ||
a single PCI device. The controllers are enumerated in order | ||
which usually means the lowest number scsi_host corresponds | ||
with the first controller, but this association is not | ||
guaranteed. The 'isci_id' attribute unambiguously identifies | ||
the controller index: '0' for the first controller, | ||
'1' for the second. |
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ARM PL061 GPIO controller | ||
|
||
Required properties: | ||
- compatible : "arm,pl061", "arm,primecell" | ||
- #gpio-cells : Should be two. The first cell is the pin number and the | ||
second cell is used to specify optional parameters: | ||
- bit 0 specifies polarity (0 for normal, 1 for inverted) | ||
- gpio-controller : Marks the device node as a GPIO controller. | ||
- interrupts : Interrupt mapping for GPIO IRQ. | ||
|
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ARM PL022 SPI controller | ||
|
||
Required properties: | ||
- compatible : "arm,pl022", "arm,primecell" | ||
- reg : Offset and length of the register set for the device | ||
- interrupts : Should contain SPI controller interrupt | ||
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||
Optional properties: | ||
- cs-gpios : should specify GPIOs used for chipselects. | ||
The gpios will be referred to as reg = <index> in the SPI child nodes. | ||
If unspecified, a single SPI device without a chip select can be used. | ||
|
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@@ -51,7 +51,7 @@ config GENERIC_CMOS_UPDATE | |
def_bool y | ||
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config GENERIC_GPIO | ||
def_bool y | ||
bool | ||
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config ZONE_DMA | ||
bool | ||
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