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drm/rockchip: vop: group vop registers
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Grouping the vop registers facilitates make register
definition clearer, and also is useful for different vop
reuse the same group register.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Reviewed-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/1501221986-29722-1-git-send-email-mark.yao@rock-chips.com
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Mark yao committed Jul 31, 2017
1 parent ac6560d commit 9a61c54
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Showing 3 changed files with 146 additions and 127 deletions.
101 changes: 49 additions & 52 deletions drivers/gpu/drm/rockchip/rockchip_drm_vop.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -42,30 +42,19 @@
#include "rockchip_drm_psr.h"
#include "rockchip_drm_vop.h"

#define REG_SET(x, base, reg, v) \
vop_mask_write(x, base + reg.offset, reg.mask, reg.shift, \
v, reg.write_mask, reg.relaxed)
#define REG_SET_MASK(x, base, reg, mask, v) \
vop_mask_write(x, base + reg.offset, \
mask, reg.shift, v, reg.write_mask, reg.relaxed)

#define VOP_WIN_SET(x, win, name, v) \
REG_SET(x, win->base, win->phy->name, v)
vop_reg_set(vop, &win->phy->name, win->base, ~0, v, #name)
#define VOP_SCL_SET(x, win, name, v) \
REG_SET(x, win->base, win->phy->scl->name, v)
vop_reg_set(vop, &win->phy->scl->name, win->base, ~0, v, #name)
#define VOP_SCL_SET_EXT(x, win, name, v) \
REG_SET(x, win->base, win->phy->scl->ext->name, v)
#define VOP_CTRL_SET(x, name, v) \
REG_SET(x, 0, (x)->data->ctrl->name, v)

#define VOP_INTR_GET(vop, name) \
vop_read_reg(vop, 0, &vop->data->ctrl->name)

#define VOP_INTR_SET(vop, name, v) \
REG_SET(vop, 0, vop->data->intr->name, v)
vop_reg_set(vop, &win->phy->scl->ext->name, \
win->base, ~0, v, #name)

#define VOP_INTR_SET_MASK(vop, name, mask, v) \
REG_SET_MASK(vop, 0, vop->data->intr->name, mask, v)
vop_reg_set(vop, &vop->data->intr->name, 0, mask, v, #name)

#define VOP_REG_SET(vop, group, name, v) \
vop_reg_set(vop, &vop->data->group->name, 0, ~0, v, #name)

#define VOP_INTR_SET_TYPE(vop, name, type, v) \
do { \
Expand All @@ -82,7 +71,7 @@
vop_get_intr_type(vop, &vop->data->intr->name, type)

#define VOP_WIN_GET(x, win, name) \
vop_read_reg(x, win->base, &win->phy->name)
vop_read_reg(x, win->offset, win->phy->name)

#define VOP_WIN_GET_YRGBADDR(vop, win) \
vop_readl(vop, win->base + win->phy->yrgb_mst.offset)
Expand Down Expand Up @@ -164,14 +153,22 @@ static inline uint32_t vop_read_reg(struct vop *vop, uint32_t base,
return (vop_readl(vop, base + reg->offset) >> reg->shift) & reg->mask;
}

static inline void vop_mask_write(struct vop *vop, uint32_t offset,
uint32_t mask, uint32_t shift, uint32_t v,
bool write_mask, bool relaxed)
static void vop_reg_set(struct vop *vop, const struct vop_reg *reg,
uint32_t _offset, uint32_t _mask, uint32_t v,
const char *reg_name)
{
if (!mask)
int offset, mask, shift;

if (!reg || !reg->mask) {
dev_dbg(vop->dev, "Warning: not support %s\n", reg_name);
return;
}

offset = reg->offset + _offset;
mask = reg->mask & _mask;
shift = reg->shift;

if (write_mask) {
if (reg->write_mask) {
v = ((v << shift) & 0xffff) | (mask << (shift + 16));
} else {
uint32_t cached_val = vop->regsbak[offset >> 2];
Expand All @@ -180,7 +177,7 @@ static inline void vop_mask_write(struct vop *vop, uint32_t offset,
vop->regsbak[offset >> 2] = v;
}

if (relaxed)
if (reg->relaxed)
writel_relaxed(v, vop->regs + offset);
else
writel(v, vop->regs + offset);
Expand All @@ -202,7 +199,7 @@ static inline uint32_t vop_get_intr_type(struct vop *vop,

static inline void vop_cfg_done(struct vop *vop)
{
VOP_CTRL_SET(vop, cfg_done, 1);
VOP_REG_SET(vop, common, cfg_done, 1);
}

static bool has_rb_swapped(uint32_t format)
Expand Down Expand Up @@ -540,7 +537,7 @@ static int vop_enable(struct drm_crtc *crtc)

spin_lock(&vop->reg_lock);

VOP_CTRL_SET(vop, standby, 0);
VOP_REG_SET(vop, common, standby, 1);

spin_unlock(&vop->reg_lock);

Expand Down Expand Up @@ -601,7 +598,7 @@ static void vop_crtc_atomic_disable(struct drm_crtc *crtc,

spin_lock(&vop->reg_lock);

VOP_CTRL_SET(vop, standby, 1);
VOP_REG_SET(vop, common, standby, 1);

spin_unlock(&vop->reg_lock);

Expand Down Expand Up @@ -925,7 +922,7 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,

spin_lock(&vop->reg_lock);

VOP_CTRL_SET(vop, standby, 1);
VOP_REG_SET(vop, common, standby, 1);

spin_unlock(&vop->reg_lock);

Expand All @@ -939,29 +936,29 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
BIT(HSYNC_POSITIVE) : 0;
pin_pol |= (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) ?
BIT(VSYNC_POSITIVE) : 0;
VOP_CTRL_SET(vop, pin_pol, pin_pol);
VOP_REG_SET(vop, output, pin_pol, pin_pol);

switch (s->output_type) {
case DRM_MODE_CONNECTOR_LVDS:
VOP_CTRL_SET(vop, rgb_en, 1);
VOP_CTRL_SET(vop, rgb_pin_pol, pin_pol);
VOP_REG_SET(vop, output, rgb_en, 1);
VOP_REG_SET(vop, output, rgb_pin_pol, pin_pol);
break;
case DRM_MODE_CONNECTOR_eDP:
VOP_CTRL_SET(vop, edp_pin_pol, pin_pol);
VOP_CTRL_SET(vop, edp_en, 1);
VOP_REG_SET(vop, output, edp_pin_pol, pin_pol);
VOP_REG_SET(vop, output, edp_en, 1);
break;
case DRM_MODE_CONNECTOR_HDMIA:
VOP_CTRL_SET(vop, hdmi_pin_pol, pin_pol);
VOP_CTRL_SET(vop, hdmi_en, 1);
VOP_REG_SET(vop, output, hdmi_pin_pol, pin_pol);
VOP_REG_SET(vop, output, hdmi_en, 1);
break;
case DRM_MODE_CONNECTOR_DSI:
VOP_CTRL_SET(vop, mipi_pin_pol, pin_pol);
VOP_CTRL_SET(vop, mipi_en, 1);
VOP_REG_SET(vop, output, mipi_pin_pol, pin_pol);
VOP_REG_SET(vop, output, mipi_en, 1);
break;
case DRM_MODE_CONNECTOR_DisplayPort:
pin_pol &= ~BIT(DCLK_INVERT);
VOP_CTRL_SET(vop, dp_pin_pol, pin_pol);
VOP_CTRL_SET(vop, dp_en, 1);
VOP_REG_SET(vop, output, dp_pin_pol, pin_pol);
VOP_REG_SET(vop, output, dp_en, 1);
break;
default:
DRM_DEV_ERROR(vop->dev, "unsupported connector_type [%d]\n",
Expand All @@ -974,25 +971,25 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA &&
!(vop_data->feature & VOP_FEATURE_OUTPUT_RGB10))
s->output_mode = ROCKCHIP_OUT_MODE_P888;
VOP_CTRL_SET(vop, out_mode, s->output_mode);
VOP_REG_SET(vop, common, out_mode, s->output_mode);

VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len);
VOP_REG_SET(vop, modeset, htotal_pw, (htotal << 16) | hsync_len);
val = hact_st << 16;
val |= hact_end;
VOP_CTRL_SET(vop, hact_st_end, val);
VOP_CTRL_SET(vop, hpost_st_end, val);
VOP_REG_SET(vop, modeset, hact_st_end, val);
VOP_REG_SET(vop, modeset, hpost_st_end, val);

VOP_CTRL_SET(vop, vtotal_pw, (vtotal << 16) | vsync_len);
VOP_REG_SET(vop, modeset, vtotal_pw, (vtotal << 16) | vsync_len);
val = vact_st << 16;
val |= vact_end;
VOP_CTRL_SET(vop, vact_st_end, val);
VOP_CTRL_SET(vop, vpost_st_end, val);
VOP_REG_SET(vop, modeset, vact_st_end, val);
VOP_REG_SET(vop, modeset, vpost_st_end, val);

VOP_INTR_SET(vop, line_flag_num[0], vact_end);
VOP_REG_SET(vop, intr, line_flag_num[0], vact_end);

clk_set_rate(vop->dclk, adjusted_mode->clock * 1000);

VOP_CTRL_SET(vop, standby, 0);
VOP_REG_SET(vop, common, standby, 0);

rockchip_drm_psr_activate(&vop->crtc);
}
Expand Down Expand Up @@ -1455,8 +1452,8 @@ static int vop_initial(struct vop *vop)

memcpy(vop->regsbak, vop->regs, vop->len);

VOP_CTRL_SET(vop, global_regdone_en, 1);
VOP_CTRL_SET(vop, dsp_blank, 0);
VOP_REG_SET(vop, misc, global_regdone_en, 1);
VOP_REG_SET(vop, common, dsp_blank, 0);

for (i = 0; i < vop_data->win_size; i++) {
const struct vop_win_data *win = &vop_data->win[i];
Expand Down
60 changes: 35 additions & 25 deletions drivers/gpu/drm/rockchip/rockchip_drm_vop.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -25,43 +25,50 @@ enum vop_data_format {
};

struct vop_reg {
uint32_t offset;
uint32_t shift;
uint32_t mask;
uint16_t offset;
uint8_t shift;
bool write_mask;
bool relaxed;
};

struct vop_ctrl {
struct vop_reg standby;
struct vop_reg data_blank;
struct vop_reg gate_en;
struct vop_reg mmu_en;
struct vop_reg rgb_en;
struct vop_modeset {
struct vop_reg htotal_pw;
struct vop_reg hact_st_end;
struct vop_reg hpost_st_end;
struct vop_reg vtotal_pw;
struct vop_reg vact_st_end;
struct vop_reg vpost_st_end;
};

struct vop_output {
struct vop_reg pin_pol;
struct vop_reg dp_pin_pol;
struct vop_reg edp_pin_pol;
struct vop_reg hdmi_pin_pol;
struct vop_reg mipi_pin_pol;
struct vop_reg rgb_pin_pol;
struct vop_reg dp_en;
struct vop_reg edp_en;
struct vop_reg hdmi_en;
struct vop_reg mipi_en;
struct vop_reg dp_en;
struct vop_reg rgb_en;
};

struct vop_common {
struct vop_reg cfg_done;
struct vop_reg dsp_blank;
struct vop_reg out_mode;
struct vop_reg data_blank;
struct vop_reg dither_down;
struct vop_reg dither_up;
struct vop_reg pin_pol;
struct vop_reg rgb_pin_pol;
struct vop_reg hdmi_pin_pol;
struct vop_reg edp_pin_pol;
struct vop_reg mipi_pin_pol;
struct vop_reg dp_pin_pol;

struct vop_reg htotal_pw;
struct vop_reg hact_st_end;
struct vop_reg vtotal_pw;
struct vop_reg vact_st_end;
struct vop_reg hpost_st_end;
struct vop_reg vpost_st_end;
struct vop_reg gate_en;
struct vop_reg mmu_en;
struct vop_reg out_mode;
struct vop_reg standby;
};

struct vop_misc {
struct vop_reg global_regdone_en;
struct vop_reg cfg_done;
};

struct vop_intr {
Expand Down Expand Up @@ -135,8 +142,11 @@ struct vop_win_data {
};

struct vop_data {
const struct vop_ctrl *ctrl;
const struct vop_intr *intr;
const struct vop_common *common;
const struct vop_misc *misc;
const struct vop_modeset *modeset;
const struct vop_output *output;
const struct vop_win_data *win;
unsigned int win_size;

Expand Down
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