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Merge tag 'samsung-clk-6.14' of https://git.kernel.org/pub/scm/linux/…
…kernel/git/krzk/linux into clk-samsung Pull Samsung clk driver updates from Krzysztof Kozlowski: - Add clock controller driver for Exynos990 SoC * tag 'samsung-clk-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: clk: samsung: Introduce Exynos990 clock controller driver clk: samsung: clk-pll: Add support for pll_{0717x, 0718x, 0732x} dt-bindings: clock: samsung: Add Exynos990 SoC CMU bindings
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Documentation/devicetree/bindings/clock/samsung,exynos990-clock.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/clock/samsung,exynos990-clock.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: Samsung Exynos990 SoC clock controller | ||
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maintainers: | ||
- Igor Belwon <igor.belwon@mentallysanemainliners.org> | ||
- Chanwoo Choi <cw00.choi@samsung.com> | ||
- Krzysztof Kozlowski <krzk@kernel.org> | ||
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description: | | ||
Exynos990 clock controller is comprised of several CMU units, generating | ||
clocks for different domains. Those CMU units are modeled as separate device | ||
tree nodes, and might depend on each other. The root clock in that root tree | ||
is an external clock: OSCCLK (26 MHz). This external clock must be defined | ||
as a fixed-rate clock in dts. | ||
CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and | ||
dividers; all other clocks of function blocks (other CMUs) are usually | ||
derived from CMU_TOP. | ||
Each clock is assigned an identifier and client nodes can use this identifier | ||
to specify the clock which they consume. All clocks available for usage | ||
in clock consumer nodes are defined as preprocessor macros in | ||
'include/dt-bindings/clock/samsung,exynos990.h' header. | ||
properties: | ||
compatible: | ||
enum: | ||
- samsung,exynos990-cmu-hsi0 | ||
- samsung,exynos990-cmu-top | ||
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clocks: | ||
minItems: 1 | ||
maxItems: 5 | ||
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clock-names: | ||
minItems: 1 | ||
maxItems: 5 | ||
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"#clock-cells": | ||
const: 1 | ||
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reg: | ||
maxItems: 1 | ||
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required: | ||
- compatible | ||
- clocks | ||
- clock-names | ||
- "#clock-cells" | ||
- reg | ||
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allOf: | ||
- if: | ||
properties: | ||
compatible: | ||
contains: | ||
const: samsung,exynos990-cmu-hsi0 | ||
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then: | ||
properties: | ||
clocks: | ||
items: | ||
- description: External reference clock (26 MHz) | ||
- description: CMU_HSI0 BUS clock (from CMU_TOP) | ||
- description: CMU_HSI0 USB31DRD clock (from CMU_TOP) | ||
- description: CMU_HSI0 USBDP_DEBUG clock (from CMU_TOP) | ||
- description: CMU_HSI0 DPGTC clock (from CMU_TOP) | ||
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clock-names: | ||
items: | ||
- const: oscclk | ||
- const: bus | ||
- const: usb31drd | ||
- const: usbdp_debug | ||
- const: dpgtc | ||
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- if: | ||
properties: | ||
compatible: | ||
contains: | ||
const: samsung,exynos990-cmu-top | ||
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then: | ||
properties: | ||
clocks: | ||
items: | ||
- description: External reference clock (26 MHz) | ||
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clock-names: | ||
items: | ||
- const: oscclk | ||
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additionalProperties: false | ||
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examples: | ||
- | | ||
#include <dt-bindings/clock/samsung,exynos990.h> | ||
cmu_hsi0: clock-controller@10a00000 { | ||
compatible = "samsung,exynos990-cmu-hsi0"; | ||
reg = <0x10a00000 0x8000>; | ||
#clock-cells = <1>; | ||
clocks = <&oscclk>, | ||
<&cmu_top CLK_DOUT_CMU_HSI0_BUS>, | ||
<&cmu_top CLK_DOUT_CMU_HSI0_USB31DRD>, | ||
<&cmu_top CLK_DOUT_CMU_HSI0_USBDP_DEBUG>, | ||
<&cmu_top CLK_DOUT_CMU_HSI0_DPGTC>; | ||
clock-names = "oscclk", | ||
"bus", | ||
"usb31drd", | ||
"usbdp_debug", | ||
"dpgtc"; | ||
}; | ||
... |
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