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drm/panel: s6e63m0: Implement 28 backlight levels
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A later version of the s6e63m0 driver in the Samsung
GT-I9070 vendor tree provides 28 different backlight
levels making use of elaborate control of the ACL
and ELVSS regulator. Implement this more fine-grained
backlight control.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
Cc: Stephan Gerhold <stephan@gerhold.net>
Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201117175621.870085-2-linus.walleij@linaro.org
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Linus Walleij committed Nov 20, 2020
1 parent c8917fd commit 9c3f0a0
Showing 1 changed file with 257 additions and 53 deletions.
310 changes: 257 additions & 53 deletions drivers/gpu/drm/panel/panel-samsung-s6e63m0.c
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Original file line number Diff line number Diff line change
Expand Up @@ -43,57 +43,234 @@
#define S6E63M0_LCD_ID_VALUE_SM2 0xB4
#define S6E63M0_LCD_ID_VALUE_SM2_1 0xB6

#define NUM_GAMMA_LEVELS 11
#define GAMMA_TABLE_COUNT 23
#define NUM_GAMMA_LEVELS 28
#define GAMMA_TABLE_COUNT 23

#define MAX_BRIGHTNESS (NUM_GAMMA_LEVELS - 1)
#define MAX_BRIGHTNESS (NUM_GAMMA_LEVELS - 1)

/* array of gamma tables for gamma value 2.2 */
static u8 const s6e63m0_gamma_22[NUM_GAMMA_LEVELS][GAMMA_TABLE_COUNT] = {
{ MCS_PGAMMACTL, 0x00,
0x18, 0x08, 0x24, 0x78, 0xEC, 0x3D, 0xC8,
0xC2, 0xB6, 0xC4, 0xC7, 0xB6, 0xD5, 0xD7,
0xCC, 0x00, 0x39, 0x00, 0x36, 0x00, 0x51 },
{ MCS_PGAMMACTL, 0x00,
0x18, 0x08, 0x24, 0x73, 0x4A, 0x3D, 0xC0,
0xC2, 0xB1, 0xBB, 0xBE, 0xAC, 0xCE, 0xCF,
0xC5, 0x00, 0x5D, 0x00, 0x5E, 0x00, 0x82 },
{ MCS_PGAMMACTL, 0x00,
0x18, 0x08, 0x24, 0x70, 0x51, 0x3E, 0xBF,
0xC1, 0xAF, 0xB9, 0xBC, 0xAB, 0xCC, 0xCC,
0xC2, 0x00, 0x65, 0x00, 0x67, 0x00, 0x8D },
{ MCS_PGAMMACTL, 0x00,
0x18, 0x08, 0x24, 0x6C, 0x54, 0x3A, 0xBC,
0xBF, 0xAC, 0xB7, 0xBB, 0xA9, 0xC9, 0xC9,
0xBE, 0x00, 0x71, 0x00, 0x73, 0x00, 0x9E },
{ MCS_PGAMMACTL, 0x00,
0x18, 0x08, 0x24, 0x69, 0x54, 0x37, 0xBB,
0xBE, 0xAC, 0xB4, 0xB7, 0xA6, 0xC7, 0xC8,
0xBC, 0x00, 0x7B, 0x00, 0x7E, 0x00, 0xAB },
{ MCS_PGAMMACTL, 0x00,
0x18, 0x08, 0x24, 0x66, 0x55, 0x34, 0xBA,
0xBD, 0xAB, 0xB1, 0xB5, 0xA3, 0xC5, 0xC6,
0xB9, 0x00, 0x85, 0x00, 0x88, 0x00, 0xBA },
{ MCS_PGAMMACTL, 0x00,
0x18, 0x08, 0x24, 0x63, 0x53, 0x31, 0xB8,
0xBC, 0xA9, 0xB0, 0xB5, 0xA2, 0xC4, 0xC4,
0xB8, 0x00, 0x8B, 0x00, 0x8E, 0x00, 0xC2 },
{ MCS_PGAMMACTL, 0x00,
0x18, 0x08, 0x24, 0x62, 0x54, 0x30, 0xB9,
0xBB, 0xA9, 0xB0, 0xB3, 0xA1, 0xC1, 0xC3,
0xB7, 0x00, 0x91, 0x00, 0x95, 0x00, 0xDA },
{ MCS_PGAMMACTL, 0x00,
0x18, 0x08, 0x24, 0x66, 0x58, 0x34, 0xB6,
0xBA, 0xA7, 0xAF, 0xB3, 0xA0, 0xC1, 0xC2,
0xB7, 0x00, 0x97, 0x00, 0x9A, 0x00, 0xD1 },
{ MCS_PGAMMACTL, 0x00,
0x18, 0x08, 0x24, 0x64, 0x56, 0x33, 0xB6,
0xBA, 0xA8, 0xAC, 0xB1, 0x9D, 0xC1, 0xC1,
0xB7, 0x00, 0x9C, 0x00, 0x9F, 0x00, 0xD6 },
{ MCS_PGAMMACTL, 0x00,
0x18, 0x08, 0x24, 0x5f, 0x50, 0x2d, 0xB6,
0xB9, 0xA7, 0xAd, 0xB1, 0x9f, 0xbe, 0xC0,
0xB5, 0x00, 0xa0, 0x00, 0xa4, 0x00, 0xdb },
/* 30 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0xA1, 0x51, 0x7B, 0xCE,
0xCB, 0xC2, 0xC7, 0xCB, 0xBC, 0xDA, 0xDD,
0xD3, 0x00, 0x53, 0x00, 0x52, 0x00, 0x6F, },
/* 40 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x97, 0x58, 0x71, 0xCC,
0xCB, 0xC0, 0xC5, 0xC9, 0xBA, 0xD9, 0xDC,
0xD1, 0x00, 0x5B, 0x00, 0x5A, 0x00, 0x7A, },
/* 50 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x96, 0x58, 0x72, 0xCB,
0xCA, 0xBF, 0xC6, 0xC9, 0xBA, 0xD6, 0xD9,
0xCD, 0x00, 0x61, 0x00, 0x61, 0x00, 0x83, },
/* 60 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x91, 0x5E, 0x6E, 0xC9,
0xC9, 0xBD, 0xC4, 0xC9, 0xB8, 0xD3, 0xD7,
0xCA, 0x00, 0x69, 0x00, 0x67, 0x00, 0x8D, },
/* 70 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x8E, 0x62, 0x6B, 0xC7,
0xC9, 0xBB, 0xC3, 0xC7, 0xB7, 0xD3, 0xD7,
0xCA, 0x00, 0x6E, 0x00, 0x6C, 0x00, 0x94, },
/* 80 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x89, 0x68, 0x65, 0xC9,
0xC9, 0xBC, 0xC1, 0xC5, 0xB6, 0xD2, 0xD5,
0xC9, 0x00, 0x73, 0x00, 0x72, 0x00, 0x9A, },
/* 90 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x89, 0x69, 0x64, 0xC7,
0xC8, 0xBB, 0xC0, 0xC5, 0xB4, 0xD2, 0xD5,
0xC9, 0x00, 0x77, 0x00, 0x76, 0x00, 0xA0, },
/* 100 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x86, 0x69, 0x60, 0xC6,
0xC8, 0xBA, 0xBF, 0xC4, 0xB4, 0xD0, 0xD4,
0xC6, 0x00, 0x7C, 0x00, 0x7A, 0x00, 0xA7, },
/* 110 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x86, 0x6A, 0x60, 0xC5,
0xC7, 0xBA, 0xBD, 0xC3, 0xB2, 0xD0, 0xD4,
0xC5, 0x00, 0x80, 0x00, 0x7E, 0x00, 0xAD, },
/* 120 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x82, 0x6B, 0x5E, 0xC4,
0xC8, 0xB9, 0xBD, 0xC2, 0xB1, 0xCE, 0xD2,
0xC4, 0x00, 0x85, 0x00, 0x82, 0x00, 0xB3, },
/* 130 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x8C, 0x6C, 0x60, 0xC3,
0xC7, 0xB9, 0xBC, 0xC1, 0xAF, 0xCE, 0xD2,
0xC3, 0x00, 0x88, 0x00, 0x86, 0x00, 0xB8, },
/* 140 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x80, 0x6C, 0x5F, 0xC1,
0xC6, 0xB7, 0xBC, 0xC1, 0xAE, 0xCD, 0xD0,
0xC2, 0x00, 0x8C, 0x00, 0x8A, 0x00, 0xBE, },
/* 150 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x80, 0x6E, 0x5F, 0xC1,
0xC6, 0xB6, 0xBC, 0xC0, 0xAE, 0xCC, 0xD0,
0xC2, 0x00, 0x8F, 0x00, 0x8D, 0x00, 0xC2, },
/* 160 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x7F, 0x6E, 0x5F, 0xC0,
0xC6, 0xB5, 0xBA, 0xBF, 0xAD, 0xCB, 0xCF,
0xC0, 0x00, 0x94, 0x00, 0x91, 0x00, 0xC8, },
/* 170 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x7C, 0x6D, 0x5C, 0xC0,
0xC6, 0xB4, 0xBB, 0xBE, 0xAD, 0xCA, 0xCF,
0xC0, 0x00, 0x96, 0x00, 0x94, 0x00, 0xCC, },
/* 180 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x7B, 0x6D, 0x5B, 0xC0,
0xC5, 0xB3, 0xBA, 0xBE, 0xAD, 0xCA, 0xCE,
0xBF, 0x00, 0x99, 0x00, 0x97, 0x00, 0xD0, },
/* 190 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x7A, 0x6D, 0x59, 0xC1,
0xC5, 0xB4, 0xB8, 0xBD, 0xAC, 0xC9, 0xCE,
0xBE, 0x00, 0x9D, 0x00, 0x9A, 0x00, 0xD5, },
/* 200 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x79, 0x6D, 0x58, 0xC1,
0xC4, 0xB4, 0xB6, 0xBD, 0xAA, 0xCA, 0xCD,
0xBE, 0x00, 0x9F, 0x00, 0x9D, 0x00, 0xD9, },
/* 210 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x79, 0x6D, 0x57, 0xC0,
0xC4, 0xB4, 0xB7, 0xBD, 0xAA, 0xC8, 0xCC,
0xBD, 0x00, 0xA2, 0x00, 0xA0, 0x00, 0xDD, },
/* 220 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x78, 0x6F, 0x58, 0xBF,
0xC4, 0xB3, 0xB5, 0xBB, 0xA9, 0xC8, 0xCC,
0xBC, 0x00, 0xA6, 0x00, 0xA3, 0x00, 0xE2, },
/* 230 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x75, 0x6F, 0x56, 0xBF,
0xC3, 0xB2, 0xB6, 0xBB, 0xA8, 0xC7, 0xCB,
0xBC, 0x00, 0xA8, 0x00, 0xA6, 0x00, 0xE6, },
/* 240 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x76, 0x6F, 0x56, 0xC0,
0xC3, 0xB2, 0xB5, 0xBA, 0xA8, 0xC6, 0xCB,
0xBB, 0x00, 0xAA, 0x00, 0xA8, 0x00, 0xE9, },
/* 250 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x74, 0x6D, 0x54, 0xBF,
0xC3, 0xB2, 0xB4, 0xBA, 0xA7, 0xC6, 0xCA,
0xBA, 0x00, 0xAD, 0x00, 0xAB, 0x00, 0xED, },
/* 260 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x74, 0x6E, 0x54, 0xBD,
0xC2, 0xB0, 0xB5, 0xBA, 0xA7, 0xC5, 0xC9,
0xBA, 0x00, 0xB0, 0x00, 0xAE, 0x00, 0xF1, },
/* 270 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x71, 0x6C, 0x50, 0xBD,
0xC3, 0xB0, 0xB4, 0xB8, 0xA6, 0xC6, 0xC9,
0xBB, 0x00, 0xB2, 0x00, 0xB1, 0x00, 0xF4, },
/* 280 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x6E, 0x6C, 0x4D, 0xBE,
0xC3, 0xB1, 0xB3, 0xB8, 0xA5, 0xC6, 0xC8,
0xBB, 0x00, 0xB4, 0x00, 0xB3, 0x00, 0xF7, },
/* 290 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x71, 0x70, 0x50, 0xBD,
0xC1, 0xB0, 0xB2, 0xB8, 0xA4, 0xC6, 0xC7,
0xBB, 0x00, 0xB6, 0x00, 0xB6, 0x00, 0xFA, },
/* 300 cd */
{ MCS_PGAMMACTL, 0x02,
0x18, 0x08, 0x24, 0x70, 0x6E, 0x4E, 0xBC,
0xC0, 0xAF, 0xB3, 0xB8, 0xA5, 0xC5, 0xC7,
0xBB, 0x00, 0xB9, 0x00, 0xB8, 0x00, 0xFC, },
};

#define NUM_ACL_LEVELS 7
#define ACL_TABLE_COUNT 28

static u8 const s6e63m0_acl[NUM_ACL_LEVELS][ACL_TABLE_COUNT] = {
/* NULL ACL */
{ MCS_BCMODE,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00 },
/* 40P ACL */
{ MCS_BCMODE,
0x4D, 0x96, 0x1D, 0x00, 0x00, 0x01, 0xDF, 0x00,
0x00, 0x03, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00,
0x01, 0x06, 0x0C, 0x11, 0x16, 0x1C, 0x21, 0x26,
0x2B, 0x31, 0x36 },
/* 43P ACL */
{ MCS_BCMODE,
0x4D, 0x96, 0x1D, 0x00, 0x00, 0x01, 0xDF, 0x00,
0x00, 0x03, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00,
0x01, 0x07, 0x0C, 0x12, 0x18, 0x1E, 0x23, 0x29,
0x2F, 0x34, 0x3A },
/* 45P ACL */
{ MCS_BCMODE,
0x4D, 0x96, 0x1D, 0x00, 0x00, 0x01, 0xDF, 0x00,
0x00, 0x03, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00,
0x01, 0x07, 0x0D, 0x13, 0x19, 0x1F, 0x25, 0x2B,
0x31, 0x37, 0x3D },
/* 47P ACL */
{ MCS_BCMODE,
0x4D, 0x96, 0x1D, 0x00, 0x00, 0x01, 0xDF, 0x00,
0x00, 0x03, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00,
0x01, 0x07, 0x0E, 0x14, 0x1B, 0x21, 0x27, 0x2E,
0x34, 0x3B, 0x41 },
/* 48P ACL */
{ MCS_BCMODE,
0x4D, 0x96, 0x1D, 0x00, 0x00, 0x01, 0xDF, 0x00,
0x00, 0x03, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00,
0x01, 0x08, 0x0E, 0x15, 0x1B, 0x22, 0x29, 0x2F,
0x36, 0x3C, 0x43 },
/* 50P ACL */
{ MCS_BCMODE,
0x4D, 0x96, 0x1D, 0x00, 0x00, 0x01, 0xDF, 0x00,
0x00, 0x03, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00,
0x01, 0x08, 0x0F, 0x16, 0x1D, 0x24, 0x2A, 0x31,
0x38, 0x3F, 0x46 },
};

/* This tells us which ACL level goes with which gamma */
static u8 const s6e63m0_acl_per_gamma[NUM_GAMMA_LEVELS] = {
/* 30 - 60 cd: ACL off/NULL */
0, 0, 0, 0,
/* 70 - 250 cd: 40P ACL */
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
/* 260 - 300 cd: 50P ACL */
6, 6, 6, 6, 6,
};

/* The ELVSS backlight regulator has 5 levels */
#define S6E63M0_ELVSS_LEVELS 5

static u8 const s6e63m0_elvss_offsets[S6E63M0_ELVSS_LEVELS] = {
0x00, /* not set */
0x0D, /* 30 cd - 100 cd */
0x09, /* 110 cd - 160 cd */
0x07, /* 170 cd - 200 cd */
0x00, /* 210 cd - 300 cd */
};

/* This tells us which ELVSS level goes with which gamma */
static u8 const s6e63m0_elvss_per_gamma[NUM_GAMMA_LEVELS] = {
/* 30 - 100 cd */
1, 1, 1, 1, 1, 1, 1, 1,
/* 110 - 160 cd */
2, 2, 2, 2, 2, 2,
/* 170 - 200 cd */
3, 3, 3, 3,
/* 210 - 300 cd */
4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
};

struct s6e63m0 {
Expand All @@ -103,6 +280,7 @@ struct s6e63m0 {
struct drm_panel panel;
struct backlight_device *bl_dev;
u8 lcd_type;
u8 elvss_pulse;

struct regulator_bulk_data supplies[2];
struct gpio_desc *reset_gpio;
Expand Down Expand Up @@ -188,17 +366,25 @@ static int s6e63m0_check_lcd_type(struct s6e63m0 *ctx)

dev_info(ctx->dev, "MTP ID: %02x %02x %02x\n", id1, id2, id3);

/* We attempt to detect what panel is mounted on the controller */
/*
* We attempt to detect what panel is mounted on the controller.
* The third ID byte represents the desired ELVSS pulse for
* some displays.
*/
switch (id2) {
case S6E63M0_LCD_ID_VALUE_M2:
dev_info(ctx->dev, "detected LCD panel AMS397GE MIPI M2\n");
ctx->elvss_pulse = id3;
break;
case S6E63M0_LCD_ID_VALUE_SM2:
case S6E63M0_LCD_ID_VALUE_SM2_1:
dev_info(ctx->dev, "detected LCD panel AMS397GE MIPI SM2\n");
ctx->elvss_pulse = id3;
break;
default:
dev_info(ctx->dev, "unknown LCD panel type %02x\n", id2);
/* Default ELVSS pulse level */
ctx->elvss_pulse = 0x16;
break;
}

Expand Down Expand Up @@ -448,15 +634,33 @@ static const struct drm_panel_funcs s6e63m0_drm_funcs = {
static int s6e63m0_set_brightness(struct backlight_device *bd)
{
struct s6e63m0 *ctx = bl_get_data(bd);

int brightness = bd->props.brightness;

/* disable and set new gamma */
u8 elvss_val;
u8 elvss_cmd_set[5];
int i;

/* Adjust ELVSS to candela level */
i = s6e63m0_elvss_per_gamma[brightness];
elvss_val = ctx->elvss_pulse + s6e63m0_elvss_offsets[i];
if (elvss_val > 0x1f)
elvss_val = 0x1f;
elvss_cmd_set[0] = MCS_TEMP_SWIRE;
elvss_cmd_set[1] = elvss_val;
elvss_cmd_set[2] = elvss_val;
elvss_cmd_set[3] = elvss_val;
elvss_cmd_set[4] = elvss_val;
s6e63m0_dcs_write(ctx, elvss_cmd_set, 5);

/* Update the ACL per gamma value */
i = s6e63m0_acl_per_gamma[brightness];
s6e63m0_dcs_write(ctx, s6e63m0_acl[i],
ARRAY_SIZE(s6e63m0_acl[i]));

/* Update gamma table */
s6e63m0_dcs_write(ctx, s6e63m0_gamma_22[brightness],
ARRAY_SIZE(s6e63m0_gamma_22[brightness]));
s6e63m0_dcs_write_seq_static(ctx, MCS_PGAMMACTL, 0x03);

/* update gamma table. */
s6e63m0_dcs_write_seq_static(ctx, MCS_PGAMMACTL, 0x01);

return s6e63m0_clear_error(ctx);
}
Expand Down

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