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Merge tag 'imx-dt-3.18' of git://git.kernel.org/pub/scm/linux/kernel/…
…git/shawnguo/linux into next/dt Merge "ARM: imx: device tree changes for 3.18" from Shawn Guo: The i.MX device tree changes for 3.18: - Device tree support for i.MX ADS and Armadeus APF9328 boards - Enable thermal sensor support for i.MX6SL - Add LCD support for i.MX6SL EVK board - Fix display duplicate name for a bunch of board dts files - Configure imx6qdl-sabresd board pins locally to remove the dependency on bootloader - A set of imx28-tx28 board dts updates from Lothar - Add pci config space as platform resource - Enable devices RTC, I2C and HDMI for nitrogen6x board - Split HummingBoard DT to support s/dl and d/q - mSATA and IR input support for HummingBoard - Add SSI baud clock for i.MX6 device trees - Add USB support for vf610-colibri and vf610-twr boards - A set of cleanup and updates on Gateworks boards * tag 'imx-dt-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (86 commits) ARM: dts: imx6: make gpt per clock can be from OSC ARM: dts: imx: ventana: add canbus support for GW52xx ARM: dts: imx: ventana: cleanup pinctrl groups ARM: dts: imx: ventana: configure padconf for all pins ARM: dts: imx: ventana: use gpio constants ARM: dts: imx: ventana: remove unused aliases ARM: dts: imx: ventana: remove unsupported dt nodes ARM: dts: imx28-tx28: add alias for CAN XCVR regulator ARM: dts: imx28-tx28: add spi-gpio as alternative for spi-mxs ARM: dts: imx28-tx28: use GPIO flags ARM: dts: imx28-tx28: remove spidev labels and add third instance of spidev ARM: dts: imx6sl: add baud clock and clock-names for ssi ARM: dts: imx6qdl: add baud clock and clock-names for ssi ARM: dts: imx6qdl-sabresd: Configure the pins locally ARM: dts: imx28-m28evk: Fix display duplicate name warning ARM: dts: imx28-tx28: Fix display duplicate name warning ARM: dts: imx28-m28cu: Fix display duplicate name warning ARM: dts: imx28-cfa100: Fix display duplicate name warning ARM: dts: imx28-apf28dev: Fix display duplicate name warning ARM: dts: imx28-apx4devkit: Fix display duplicate name warning ... Signed-off-by: Olof Johansson <olof@lixom.net>
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/* | ||
* Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru> | ||
* | ||
* The code contained herein is licensed under the GNU General Public | ||
* License. You may obtain a copy of the GNU General Public License | ||
* Version 2 or later at the following locations: | ||
* | ||
* http://www.opensource.org/licenses/gpl-license.html | ||
* http://www.gnu.org/copyleft/gpl.html | ||
*/ | ||
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/dts-v1/; | ||
#include "imx1.dtsi" | ||
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/ { | ||
model = "Freescale MX1 ADS"; | ||
compatible = "fsl,imx1ads", "fsl,imx1"; | ||
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chosen { | ||
stdout-path = &uart1; | ||
}; | ||
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memory { | ||
reg = <0x08000000 0x04000000>; | ||
}; | ||
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clocks { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
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clk32 { | ||
compatible = "fsl,imx-clk32", "fixed-clock"; | ||
#clock-cells = <0>; | ||
clock-frequency = <32000>; | ||
}; | ||
}; | ||
}; | ||
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&cspi1 { | ||
pinctrl-0 = <&pinctrl_cspi1>; | ||
fsl,spi-num-chipselects = <1>; | ||
cs-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; | ||
status = "okay"; | ||
}; | ||
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&i2c { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&pinctrl_i2c>; | ||
status = "okay"; | ||
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extgpio0: pcf8575@22 { | ||
compatible = "nxp,pcf8575"; | ||
reg = <0x22>; | ||
gpio-controller; | ||
#gpio-cells = <2>; | ||
}; | ||
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extgpio1: pcf8575@24 { | ||
compatible = "nxp,pcf8575"; | ||
reg = <0x24>; | ||
gpio-controller; | ||
#gpio-cells = <2>; | ||
}; | ||
}; | ||
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&uart1 { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&pinctrl_uart1>; | ||
fsl,uart-has-rtscts; | ||
status = "okay"; | ||
}; | ||
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&uart2 { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&pinctrl_uart2>; | ||
fsl,uart-has-rtscts; | ||
status = "okay"; | ||
}; | ||
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&weim { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&pinctrl_weim>; | ||
status = "okay"; | ||
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nor: nor@0,0 { | ||
compatible = "cfi-flash"; | ||
reg = <0 0x00000000 0x02000000>; | ||
bank-width = <4>; | ||
fsl,weim-cs-timing = <0x00003e00 0x00000801>; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
}; | ||
}; | ||
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&iomuxc { | ||
imx1-ads { | ||
pinctrl_cspi1: cspi1grp { | ||
fsl,pins = < | ||
MX1_PAD_SPI1_MISO__SPI1_MISO 0x0 | ||
MX1_PAD_SPI1_MOSI__SPI1_MOSI 0x0 | ||
MX1_PAD_SPI1_RDY__SPI1_RDY 0x0 | ||
MX1_PAD_SPI1_SCLK__SPI1_SCLK 0x0 | ||
MX1_PAD_SPI1_SS__GPIO3_15 0x0 | ||
>; | ||
}; | ||
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pinctrl_i2c: i2cgrp { | ||
fsl,pins = < | ||
MX1_PAD_I2C_SCL__I2C_SCL 0x0 | ||
MX1_PAD_I2C_SDA__I2C_SDA 0x0 | ||
>; | ||
}; | ||
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pinctrl_uart1: uart1grp { | ||
fsl,pins = < | ||
MX1_PAD_UART1_TXD__UART1_TXD 0x0 | ||
MX1_PAD_UART1_RXD__UART1_RXD 0x0 | ||
MX1_PAD_UART1_CTS__UART1_CTS 0x0 | ||
MX1_PAD_UART1_RTS__UART1_RTS 0x0 | ||
>; | ||
}; | ||
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pinctrl_uart2: uart2grp { | ||
fsl,pins = < | ||
MX1_PAD_UART2_TXD__UART2_TXD 0x0 | ||
MX1_PAD_UART2_RXD__UART2_RXD 0x0 | ||
MX1_PAD_UART2_CTS__UART2_CTS 0x0 | ||
MX1_PAD_UART2_RTS__UART2_RTS 0x0 | ||
>; | ||
}; | ||
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pinctrl_weim: weimgrp { | ||
fsl,pins = < | ||
MX1_PAD_A0__A0 0x0 | ||
MX1_PAD_A16__A16 0x0 | ||
MX1_PAD_A17__A17 0x0 | ||
MX1_PAD_A18__A18 0x0 | ||
MX1_PAD_A19__A19 0x0 | ||
MX1_PAD_A20__A20 0x0 | ||
MX1_PAD_A21__A21 0x0 | ||
MX1_PAD_A22__A22 0x0 | ||
MX1_PAD_A23__A23 0x0 | ||
MX1_PAD_A24__A24 0x0 | ||
MX1_PAD_BCLK__BCLK 0x0 | ||
MX1_PAD_CS4__CS4 0x0 | ||
MX1_PAD_DTACK__DTACK 0x0 | ||
MX1_PAD_ECB__ECB 0x0 | ||
MX1_PAD_LBA__LBA 0x0 | ||
>; | ||
}; | ||
}; | ||
}; |
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@@ -0,0 +1,129 @@ | ||
/* | ||
* Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru> | ||
* | ||
* The code contained herein is licensed under the GNU General Public | ||
* License. You may obtain a copy of the GNU General Public License | ||
* Version 2 or later at the following locations: | ||
* | ||
* http://www.opensource.org/licenses/gpl-license.html | ||
* http://www.gnu.org/copyleft/gpl.html | ||
*/ | ||
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/dts-v1/; | ||
#include "imx1.dtsi" | ||
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/ { | ||
model = "Armadeus APF9328"; | ||
compatible = "armadeus,imx1-apf9328", "fsl,imx1"; | ||
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chosen { | ||
stdout-path = &uart1; | ||
}; | ||
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memory { | ||
reg = <0x08000000 0x00800000>; | ||
}; | ||
}; | ||
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&i2c { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&pinctrl_i2c>; | ||
status = "okay"; | ||
}; | ||
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&uart1 { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&pinctrl_uart1>; | ||
fsl,uart-has-rtscts; | ||
status = "okay"; | ||
}; | ||
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&uart2 { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&pinctrl_uart2>; | ||
fsl,uart-has-rtscts; | ||
status = "okay"; | ||
}; | ||
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&weim { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&pinctrl_weim>; | ||
status = "okay"; | ||
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nor: nor@0,0 { | ||
compatible = "cfi-flash"; | ||
reg = <0 0x00000000 0x02000000>; | ||
bank-width = <2>; | ||
fsl,weim-cs-timing = <0x00330e04 0x00000d01>; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
}; | ||
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eth: eth@4,c00000 { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&pinctrl_eth>; | ||
compatible = "davicom,dm9000"; | ||
reg = < | ||
4 0x00c00000 0x2 | ||
4 0x00c00002 0x2 | ||
>; | ||
interrupt-parent = <&gpio2>; | ||
interrupts = <14 IRQ_TYPE_LEVEL_LOW>; | ||
fsl,weim-cs-timing = <0x0000c700 0x19190d01>; | ||
}; | ||
}; | ||
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&iomuxc { | ||
imx1-apf9328 { | ||
pinctrl_eth: ethgrp { | ||
fsl,pins = < | ||
MX1_PAD_SIM_SVEN__GPIO2_14 0x0 | ||
>; | ||
}; | ||
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pinctrl_i2c: i2cgrp { | ||
fsl,pins = < | ||
MX1_PAD_I2C_SCL__I2C_SCL 0x0 | ||
MX1_PAD_I2C_SDA__I2C_SDA 0x0 | ||
>; | ||
}; | ||
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pinctrl_uart1: uart1grp { | ||
fsl,pins = < | ||
MX1_PAD_UART1_TXD__UART1_TXD 0x0 | ||
MX1_PAD_UART1_RXD__UART1_RXD 0x0 | ||
MX1_PAD_UART1_CTS__UART1_CTS 0x0 | ||
MX1_PAD_UART1_RTS__UART1_RTS 0x0 | ||
>; | ||
}; | ||
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pinctrl_uart2: uart2grp { | ||
fsl,pins = < | ||
MX1_PAD_UART2_TXD__UART2_TXD 0x0 | ||
MX1_PAD_UART2_RXD__UART2_RXD 0x0 | ||
MX1_PAD_UART2_CTS__UART2_CTS 0x0 | ||
MX1_PAD_UART2_RTS__UART2_RTS 0x0 | ||
>; | ||
}; | ||
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pinctrl_weim: weimgrp { | ||
fsl,pins = < | ||
MX1_PAD_A0__A0 0x0 | ||
MX1_PAD_A16__A16 0x0 | ||
MX1_PAD_A17__A17 0x0 | ||
MX1_PAD_A18__A18 0x0 | ||
MX1_PAD_A19__A19 0x0 | ||
MX1_PAD_A20__A20 0x0 | ||
MX1_PAD_A21__A21 0x0 | ||
MX1_PAD_A22__A22 0x0 | ||
MX1_PAD_A23__A23 0x0 | ||
MX1_PAD_A24__A24 0x0 | ||
MX1_PAD_BCLK__BCLK 0x0 | ||
MX1_PAD_CS4__CS4 0x0 | ||
MX1_PAD_DTACK__DTACK 0x0 | ||
MX1_PAD_ECB__ECB 0x0 | ||
MX1_PAD_LBA__LBA 0x0 | ||
>; | ||
}; | ||
}; | ||
}; |
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