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sh: kfr2r09 board support - LCDC panel
This patch adds support for the WQVGA LCD display used by the KFR2R09 board. The LCD module is a TX07D34VM0AAA made by Hitachi, and this module is made up by a R61517 chip together with a 240x400 pixel display. The screen is attached to the SuperH Mobile LCDC using a 18-bit SYS bus. The register settings used by the SYS panel setup code are based on an out-of-tree driver which apart from duplicating all LCDC driver code and writing to non-existing hardware registers also never was posted for upstream merge. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Magnus Damm
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Paul Mundt
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Aug 6, 2009
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obj-y := setup.o | ||
obj-$(CONFIG_FB_SH_MOBILE_LCDC) += lcd_wqvga.o |
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/* | ||
* KFR2R09 LCD panel support | ||
* | ||
* Copyright (C) 2009 Magnus Damm | ||
* | ||
* Register settings based on the out-of-tree t33fb.c driver | ||
* Copyright (C) 2008 Lineo Solutions, Inc. | ||
* | ||
* This file is subject to the terms and conditions of the GNU General Public | ||
* License. See the file COPYING in the main directory of this archive for | ||
* more details. | ||
*/ | ||
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#include <linux/delay.h> | ||
#include <linux/err.h> | ||
#include <linux/fb.h> | ||
#include <linux/init.h> | ||
#include <linux/kernel.h> | ||
#include <linux/module.h> | ||
#include <linux/gpio.h> | ||
#include <video/sh_mobile_lcdc.h> | ||
#include <mach/kfr2r09.h> | ||
#include <cpu/sh7724.h> | ||
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/* The on-board LCD module is a Hitachi TX07D34VM0AAA. This module is made | ||
* up of a 240x400 LCD hooked up to a R61517 driver IC. The driver IC is | ||
* communicating with the main port of the LCDC using an 18-bit SYS interface. | ||
* | ||
* The device code for this LCD module is 0x01221517. | ||
*/ | ||
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static const unsigned char data_frame_if[] = { | ||
0x02, /* WEMODE: 1=cont, 0=one-shot */ | ||
0x00, 0x00, | ||
0x00, /* EPF, DFM */ | ||
0x02, /* RIM[1] : 1 (18bpp) */ | ||
}; | ||
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static const unsigned char data_panel[] = { | ||
0x0b, | ||
0x63, /* 400 lines */ | ||
0x04, 0x00, 0x00, 0x04, 0x11, 0x00, 0x00, | ||
}; | ||
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static const unsigned char data_timing[] = { | ||
0x00, 0x00, 0x13, 0x08, 0x08, | ||
}; | ||
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static const unsigned char data_timing_src[] = { | ||
0x11, 0x01, 0x00, 0x01, | ||
}; | ||
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static const unsigned char data_gamma[] = { | ||
0x01, 0x02, 0x08, 0x23, 0x03, 0x0c, 0x00, 0x06, 0x00, 0x00, | ||
0x01, 0x00, 0x0c, 0x23, 0x03, 0x08, 0x02, 0x06, 0x00, 0x00, | ||
}; | ||
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static const unsigned char data_power[] = { | ||
0x07, 0xc5, 0xdc, 0x02, 0x33, 0x0a, | ||
}; | ||
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static unsigned long read_reg(void *sohandle, | ||
struct sh_mobile_lcdc_sys_bus_ops *so) | ||
{ | ||
return so->read_data(sohandle); | ||
} | ||
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static void write_reg(void *sohandle, | ||
struct sh_mobile_lcdc_sys_bus_ops *so, | ||
int i, unsigned long v) | ||
{ | ||
if (i) | ||
so->write_data(sohandle, v); /* PTH4/LCDRS High [param, 17:0] */ | ||
else | ||
so->write_index(sohandle, v); /* PTH4/LCDRS Low [cmd, 7:0] */ | ||
} | ||
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static void write_data(void *sohandle, | ||
struct sh_mobile_lcdc_sys_bus_ops *so, | ||
unsigned char const *data, int no_data) | ||
{ | ||
int i; | ||
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for (i = 0; i < no_data; i++) | ||
write_reg(sohandle, so, 1, data[i]); | ||
} | ||
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static unsigned long read_device_code(void *sohandle, | ||
struct sh_mobile_lcdc_sys_bus_ops *so) | ||
{ | ||
unsigned long device_code; | ||
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/* access protect OFF */ | ||
write_reg(sohandle, so, 0, 0xb0); | ||
write_reg(sohandle, so, 1, 0x00); | ||
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/* deep standby OFF */ | ||
write_reg(sohandle, so, 0, 0xb1); | ||
write_reg(sohandle, so, 1, 0x00); | ||
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/* device code command */ | ||
write_reg(sohandle, so, 0, 0xbf); | ||
mdelay(50); | ||
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/* dummy read */ | ||
read_reg(sohandle, so); | ||
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/* read device code */ | ||
device_code = ((read_reg(sohandle, so) & 0xff) << 24); | ||
device_code |= ((read_reg(sohandle, so) & 0xff) << 16); | ||
device_code |= ((read_reg(sohandle, so) & 0xff) << 8); | ||
device_code |= (read_reg(sohandle, so) & 0xff); | ||
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return device_code; | ||
} | ||
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static void write_memory_start(void *sohandle, | ||
struct sh_mobile_lcdc_sys_bus_ops *so) | ||
{ | ||
write_reg(sohandle, so, 0, 0x2c); | ||
} | ||
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static void clear_memory(void *sohandle, | ||
struct sh_mobile_lcdc_sys_bus_ops *so) | ||
{ | ||
int i; | ||
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/* write start */ | ||
write_memory_start(sohandle, so); | ||
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/* paint it black */ | ||
for (i = 0; i < (240 * 400); i++) | ||
write_reg(sohandle, so, 1, 0x00); | ||
} | ||
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static void display_on(void *sohandle, | ||
struct sh_mobile_lcdc_sys_bus_ops *so) | ||
{ | ||
/* access protect off */ | ||
write_reg(sohandle, so, 0, 0xb0); | ||
write_reg(sohandle, so, 1, 0x00); | ||
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/* exit deep standby mode */ | ||
write_reg(sohandle, so, 0, 0xb1); | ||
write_reg(sohandle, so, 1, 0x00); | ||
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/* frame memory I/F */ | ||
write_reg(sohandle, so, 0, 0xb3); | ||
write_data(sohandle, so, data_frame_if, ARRAY_SIZE(data_frame_if)); | ||
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/* display mode and frame memory write mode */ | ||
write_reg(sohandle, so, 0, 0xb4); | ||
write_reg(sohandle, so, 1, 0x00); /* DBI, internal clock */ | ||
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/* panel */ | ||
write_reg(sohandle, so, 0, 0xc0); | ||
write_data(sohandle, so, data_panel, ARRAY_SIZE(data_panel)); | ||
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/* timing (normal) */ | ||
write_reg(sohandle, so, 0, 0xc1); | ||
write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing)); | ||
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/* timing (partial) */ | ||
write_reg(sohandle, so, 0, 0xc2); | ||
write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing)); | ||
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/* timing (idle) */ | ||
write_reg(sohandle, so, 0, 0xc3); | ||
write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing)); | ||
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/* timing (source/VCOM/gate driving) */ | ||
write_reg(sohandle, so, 0, 0xc4); | ||
write_data(sohandle, so, data_timing_src, ARRAY_SIZE(data_timing_src)); | ||
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/* gamma (red) */ | ||
write_reg(sohandle, so, 0, 0xc8); | ||
write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma)); | ||
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/* gamma (green) */ | ||
write_reg(sohandle, so, 0, 0xc9); | ||
write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma)); | ||
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/* gamma (blue) */ | ||
write_reg(sohandle, so, 0, 0xca); | ||
write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma)); | ||
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/* power (common) */ | ||
write_reg(sohandle, so, 0, 0xd0); | ||
write_data(sohandle, so, data_power, ARRAY_SIZE(data_power)); | ||
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/* VCOM */ | ||
write_reg(sohandle, so, 0, 0xd1); | ||
write_reg(sohandle, so, 1, 0x00); | ||
write_reg(sohandle, so, 1, 0x0f); | ||
write_reg(sohandle, so, 1, 0x02); | ||
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/* power (normal) */ | ||
write_reg(sohandle, so, 0, 0xd2); | ||
write_reg(sohandle, so, 1, 0x63); | ||
write_reg(sohandle, so, 1, 0x24); | ||
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/* power (partial) */ | ||
write_reg(sohandle, so, 0, 0xd3); | ||
write_reg(sohandle, so, 1, 0x63); | ||
write_reg(sohandle, so, 1, 0x24); | ||
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/* power (idle) */ | ||
write_reg(sohandle, so, 0, 0xd4); | ||
write_reg(sohandle, so, 1, 0x63); | ||
write_reg(sohandle, so, 1, 0x24); | ||
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write_reg(sohandle, so, 0, 0xd8); | ||
write_reg(sohandle, so, 1, 0x77); | ||
write_reg(sohandle, so, 1, 0x77); | ||
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/* TE signal */ | ||
write_reg(sohandle, so, 0, 0x35); | ||
write_reg(sohandle, so, 1, 0x00); | ||
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/* TE signal line */ | ||
write_reg(sohandle, so, 0, 0x44); | ||
write_reg(sohandle, so, 1, 0x00); | ||
write_reg(sohandle, so, 1, 0x00); | ||
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/* column address */ | ||
write_reg(sohandle, so, 0, 0x2a); | ||
write_reg(sohandle, so, 1, 0x00); | ||
write_reg(sohandle, so, 1, 0x00); | ||
write_reg(sohandle, so, 1, 0x00); | ||
write_reg(sohandle, so, 1, 0xef); | ||
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/* page address */ | ||
write_reg(sohandle, so, 0, 0x2b); | ||
write_reg(sohandle, so, 1, 0x00); | ||
write_reg(sohandle, so, 1, 0x00); | ||
write_reg(sohandle, so, 1, 0x01); | ||
write_reg(sohandle, so, 1, 0x8f); | ||
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/* exit sleep mode */ | ||
write_reg(sohandle, so, 0, 0x11); | ||
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mdelay(120); | ||
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/* clear vram */ | ||
clear_memory(sohandle, so); | ||
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/* display ON */ | ||
write_reg(sohandle, so, 0, 0x29); | ||
mdelay(1); | ||
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write_memory_start(sohandle, so); | ||
} | ||
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int kfr2r09_lcd_setup(void *board_data, void *sohandle, | ||
struct sh_mobile_lcdc_sys_bus_ops *so) | ||
{ | ||
/* power on */ | ||
gpio_set_value(GPIO_PTF4, 0); /* PROTECT/ -> L */ | ||
gpio_set_value(GPIO_PTE4, 0); /* LCD_RST/ -> L */ | ||
gpio_set_value(GPIO_PTF4, 1); /* PROTECT/ -> H */ | ||
udelay(1100); | ||
gpio_set_value(GPIO_PTE4, 1); /* LCD_RST/ -> H */ | ||
udelay(10); | ||
gpio_set_value(GPIO_PTF4, 0); /* PROTECT/ -> L */ | ||
mdelay(20); | ||
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if (read_device_code(sohandle, so) != 0x01221517) | ||
return -ENODEV; | ||
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pr_info("KFR2R09 WQVGA LCD Module detected.\n"); | ||
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display_on(sohandle, so); | ||
return 0; | ||
} | ||
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#define CTRL_CKSW 0x10 | ||
#define CTRL_C10 0x20 | ||
#define CTRL_CPSW 0x80 | ||
#define MAIN_MLED4 0x40 | ||
#define MAIN_MSW 0x80 | ||
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static int kfr2r09_lcd_backlight(int on) | ||
{ | ||
struct i2c_adapter *a; | ||
struct i2c_msg msg; | ||
unsigned char buf[2]; | ||
int ret; | ||
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a = i2c_get_adapter(0); | ||
if (!a) | ||
return -ENODEV; | ||
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buf[0] = 0x00; | ||
if (on) | ||
buf[1] = CTRL_CPSW | CTRL_C10 | CTRL_CKSW; | ||
else | ||
buf[1] = 0; | ||
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msg.addr = 0x75; | ||
msg.buf = buf; | ||
msg.len = 2; | ||
msg.flags = 0; | ||
ret = i2c_transfer(a, &msg, 1); | ||
if (ret != 1) | ||
return -ENODEV; | ||
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buf[0] = 0x01; | ||
if (on) | ||
buf[1] = MAIN_MSW | MAIN_MLED4 | 0x0c; | ||
else | ||
buf[1] = 0; | ||
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msg.addr = 0x75; | ||
msg.buf = buf; | ||
msg.len = 2; | ||
msg.flags = 0; | ||
ret = i2c_transfer(a, &msg, 1); | ||
if (ret != 1) | ||
return -ENODEV; | ||
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return 0; | ||
} | ||
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void kfr2r09_lcd_on(void *board_data) | ||
{ | ||
kfr2r09_lcd_backlight(1); | ||
} | ||
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void kfr2r09_lcd_off(void *board_data) | ||
{ | ||
kfr2r09_lcd_backlight(0); | ||
} |
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