powerpc/83xx: Add FSL eSDHC support for MPC837x-RDB boards

Simply add appropriate sdhci nodes. Note that U-Boot should configure pin multiplexing for eSDHC prior to Linux could use it. U-Boot should also fill-in the clock-frequency property (eSDHC clock depends on board-specific SCCR[ESDHCCM] bits). Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
mariux64 · Feb 6, 2009 · a0e8618 · a0e8618
1 parent 766d282
commit a0e8618
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diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -320,6 +320,15 @@
 			fsl,descriptor-types-mask = <0x3ab0ebf>;
 		};
 
+		sdhci@2e000 {
+			compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
+			reg = <0x2e000 0x1000>;
+			interrupts = <42 0x8>;
+			interrupt-parent = <&ipic>;
+			/* Filled in by U-Boot */
+			clock-frequency = <0>;
+		};
+
 		sata@18000 {
 			compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
 			reg = <0x18000 0x1000>;

diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -318,6 +318,15 @@
 			fsl,descriptor-types-mask = <0x3ab0ebf>;
 		};
 
+		sdhci@2e000 {
+			compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
+			reg = <0x2e000 0x1000>;
+			interrupts = <42 0x8>;
+			interrupt-parent = <&ipic>;
+			/* Filled in by U-Boot */
+			clock-frequency = <0>;
+		};
+
 		/* IPIC
 		 * interrupts cell = <intr #, sense>
 		 * sense values match linux IORESOURCE_IRQ_* defines:

diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -317,6 +317,15 @@
 			fsl,descriptor-types-mask = <0x3ab0ebf>;
 		};
 
+		sdhci@2e000 {
+			compatible = "fsl,mpc8379-esdhc";
+			reg = <0x2e000 0x1000>;
+			interrupts = <42 0x8>;
+			interrupt-parent = <&ipic>;
+			/* Filled in by U-Boot */
+			clock-frequency = <0>;
+		};
+
 		sata@18000 {
 			compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
 			reg = <0x18000 0x1000>;