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ARM: 6316/1: ftrace: add Thumb-2 support
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Fix the mcount routines to build and run on a kernel built with the
Thumb-2 instruction set by correcting the following errors using the
fixes suggested by Catalin Marinas:

 - Problem: The following assembler errors appear at the "adr r0,
   ftrace_stub" instruction:

   entry-common.S: Assembler messages:
   entry-common.S:179: Error: invalid immediate for address calculation (value = 0x00000004)

   Fix: The errors don't occur with a non-global symbol, so use one.

 - Problem: The "mov lr, pc" does not set the lsb when storing the pc in
   lr.  The called function returns with "bx lr", and the mode changes
   to ARM.

   Fix: Add a label on the return address and use "adr lr, BSYM(label)".

We don't modify the old mcount because it won't be built when using
Thumb-2.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Rabin Vincent authored and Russell King committed Sep 2, 2010
1 parent 72fa62f commit a3ba87a
Showing 1 changed file with 4 additions and 2 deletions.
6 changes: 4 additions & 2 deletions arch/arm/kernel/entry-common.S
Original file line number Diff line number Diff line change
Expand Up @@ -167,7 +167,7 @@ ENTRY(__gnu_mcount_nc)
stmdb sp!, {r0-r3, lr}
ldr r0, =ftrace_trace_function
ldr r2, [r0]
adr r0, ftrace_stub
adr r0, .Lftrace_stub
cmp r0, r2
bne gnu_trace
ldmia sp!, {r0-r3, ip, lr}
Expand All @@ -177,8 +177,9 @@ gnu_trace:
ldr r1, [sp, #20] @ lr of instrumented routine
mov r0, lr
sub r0, r0, #MCOUNT_INSN_SIZE
mov lr, pc
adr lr, BSYM(1f)
mov pc, r2
1:
ldmia sp!, {r0-r3, ip, lr}
mov pc, ip
ENDPROC(__gnu_mcount_nc)
Expand Down Expand Up @@ -213,6 +214,7 @@ ENDPROC(mcount)
#endif /* CONFIG_DYNAMIC_FTRACE */

ENTRY(ftrace_stub)
.Lftrace_stub:
mov pc, lr
ENDPROC(ftrace_stub)

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