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Merge cpufreq updates for 6.14: - Use str_enable_disable()-like helpers in cpufreq (Krzysztof Kozlowski). - Extend the Apple cpufreq driver to support more SoCs (Hector Martin, Nick Chan). - Add new cpufreq driver for Airoha SoCs (Christian Marangi). - Fix using cpufreq-dt as module (Andreas Kemnade). - Minor fixes for Sparc, SCMI, and Qcom cpufreq drivers (Ethan Carter Edwards, Sibi Sankar, Manivannan Sadhasivam). - Fix the maximum supported frequency computation in the ACPI cpufreq driver to avoid relying on unfounded assumptions (Gautham Shenoy). - Fix an amd-pstate driver regression with preferred core rankings not being used (Mario Limonciello). - Fix a precision issue with frequency calculation in the amd-pstate driver (Naresh Solanki). - Add ftrace event to the amd-pstate driver for active mode (Mario Limonciello). - Set default EPP policy on Ryzen processors in amd-pstate (Mario Limonciello). - Clean up the amd-pstate cpufreq driver and optimize it to increase code reuse (Mario Limonciello, Dhananjay Ugwekar). - Use CPPC to get scaling factors between HWP performance levels and frequency in the intel_pstate driver and make it stop using a built -in scaling factor for the Arrow Lake processor (Rafael Wysocki). - Make intel_pstate initialize epp_policy to CPUFREQ_POLICY_UNKNOWN for consistency with CPU offline (Christian Loehle). - Fix superfluous updates caused by need_freq_update in the schedutil cpufreq governor (Sultan Alsawaf). * pm-cpufreq: (40 commits) cpufreq: Use str_enable_disable()-like helpers cpufreq: airoha: Add EN7581 CPUFreq SMCCC driver cpufreq: ACPI: Fix max-frequency computation cpufreq/amd-pstate: Refactor max frequency calculation cpufreq/amd-pstate: Fix prefcore rankings cpufreq: sparc: change kzalloc to kcalloc cpufreq: qcom: Implement clk_ops::determine_rate() for qcom_cpufreq* clocks cpufreq: qcom: Fix qcom_cpufreq_hw_recalc_rate() to query LUT if LMh IRQ is not available cpufreq: apple-soc: Add Apple A7-A8X SoC cpufreq support cpufreq: apple-soc: Set fallback transition latency to APPLE_DVFS_TRANSITION_TIMEOUT cpufreq: apple-soc: Increase cluster switch timeout to 400us cpufreq: apple-soc: Use 32-bit read for status register cpufreq: apple-soc: Allow per-SoC configuration of APPLE_DVFS_CMD_PS1 cpufreq: apple-soc: Drop setting the PS2 field on M2+ dt-bindings: cpufreq: apple,cluster-cpufreq: Add A7-A11, T2 compatibles dt-bindings: cpufreq: Document support for Airoha EN7581 CPUFreq cpufreq: fix using cpufreq-dt as module cpufreq: scmi: Register for limit change notifications cpufreq: schedutil: Fix superfluous updates caused by need_freq_update cpufreq: intel_pstate: Use CPUFREQ_POLICY_UNKNOWN ...
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Documentation/devicetree/bindings/cpufreq/airoha,en7581-cpufreq.yaml
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| @@ -0,0 +1,55 @@ | ||
| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
| %YAML 1.2 | ||
| --- | ||
| $id: http://devicetree.org/schemas/cpufreq/airoha,en7581-cpufreq.yaml# | ||
| $schema: http://devicetree.org/meta-schemas/core.yaml# | ||
|
|
||
| title: Airoha EN7581 CPUFreq | ||
|
|
||
| maintainers: | ||
| - Christian Marangi <ansuelsmth@gmail.com> | ||
|
|
||
| description: | | ||
| On newer Airoha SoC, CPU Frequency is scaled indirectly with SMC commands | ||
| to ATF. | ||
| A virtual clock is exposed. This virtual clock is a get-only clock and | ||
| is used to expose the current global CPU clock. The frequency info comes | ||
| by the output of the SMC command that reports the clock in MHz. | ||
| The SMC sets the CPU clock by providing an index, this is modelled as | ||
| performance states in a power domain. | ||
| CPUs can't be individually scaled as the CPU frequency is shared across | ||
| all CPUs and is global. | ||
| properties: | ||
| compatible: | ||
| const: airoha,en7581-cpufreq | ||
|
|
||
| '#clock-cells': | ||
| const: 0 | ||
|
|
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| '#power-domain-cells': | ||
| const: 0 | ||
|
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| operating-points-v2: true | ||
|
|
||
| required: | ||
| - compatible | ||
| - '#clock-cells' | ||
| - '#power-domain-cells' | ||
| - operating-points-v2 | ||
|
|
||
| additionalProperties: false | ||
|
|
||
| examples: | ||
| - | | ||
| performance-domain { | ||
| compatible = "airoha,en7581-cpufreq"; | ||
| operating-points-v2 = <&cpu_smcc_opp_table>; | ||
| #power-domain-cells = <0>; | ||
| #clock-cells = <0>; | ||
| }; |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,152 @@ | ||
| // SPDX-License-Identifier: GPL-2.0 | ||
|
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||
| #include <linux/bitfield.h> | ||
| #include <linux/cpufreq.h> | ||
| #include <linux/module.h> | ||
| #include <linux/platform_device.h> | ||
| #include <linux/pm_domain.h> | ||
| #include <linux/pm_runtime.h> | ||
| #include <linux/slab.h> | ||
|
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| #include "cpufreq-dt.h" | ||
|
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| struct airoha_cpufreq_priv { | ||
| int opp_token; | ||
| struct dev_pm_domain_list *pd_list; | ||
| struct platform_device *cpufreq_dt; | ||
| }; | ||
|
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| static struct platform_device *cpufreq_pdev; | ||
|
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| /* NOP function to disable OPP from setting clock */ | ||
| static int airoha_cpufreq_config_clks_nop(struct device *dev, | ||
| struct opp_table *opp_table, | ||
| struct dev_pm_opp *opp, | ||
| void *data, bool scaling_down) | ||
| { | ||
| return 0; | ||
| } | ||
|
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| static const char * const airoha_cpufreq_clk_names[] = { "cpu", NULL }; | ||
| static const char * const airoha_cpufreq_pd_names[] = { "perf" }; | ||
|
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| static int airoha_cpufreq_probe(struct platform_device *pdev) | ||
| { | ||
| const struct dev_pm_domain_attach_data attach_data = { | ||
| .pd_names = airoha_cpufreq_pd_names, | ||
| .num_pd_names = ARRAY_SIZE(airoha_cpufreq_pd_names), | ||
| .pd_flags = PD_FLAG_DEV_LINK_ON | PD_FLAG_REQUIRED_OPP, | ||
| }; | ||
| struct dev_pm_opp_config config = { | ||
| .clk_names = airoha_cpufreq_clk_names, | ||
| .config_clks = airoha_cpufreq_config_clks_nop, | ||
| }; | ||
| struct platform_device *cpufreq_dt; | ||
| struct airoha_cpufreq_priv *priv; | ||
| struct device *dev = &pdev->dev; | ||
| struct device *cpu_dev; | ||
| int ret; | ||
|
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| /* CPUs refer to the same OPP table */ | ||
| cpu_dev = get_cpu_device(0); | ||
| if (!cpu_dev) | ||
| return -ENODEV; | ||
|
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| priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); | ||
| if (!priv) | ||
| return -ENOMEM; | ||
|
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| /* Set OPP table conf with NOP config_clks */ | ||
| priv->opp_token = dev_pm_opp_set_config(cpu_dev, &config); | ||
| if (priv->opp_token < 0) | ||
| return dev_err_probe(dev, priv->opp_token, "Failed to set OPP config\n"); | ||
|
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| /* Attach PM for OPP */ | ||
| ret = dev_pm_domain_attach_list(cpu_dev, &attach_data, | ||
| &priv->pd_list); | ||
| if (ret) | ||
| goto clear_opp_config; | ||
|
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| cpufreq_dt = platform_device_register_simple("cpufreq-dt", -1, NULL, 0); | ||
| ret = PTR_ERR_OR_ZERO(cpufreq_dt); | ||
| if (ret) { | ||
| dev_err(dev, "failed to create cpufreq-dt device: %d\n", ret); | ||
| goto detach_pm; | ||
| } | ||
|
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| priv->cpufreq_dt = cpufreq_dt; | ||
| platform_set_drvdata(pdev, priv); | ||
|
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| return 0; | ||
|
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| detach_pm: | ||
| dev_pm_domain_detach_list(priv->pd_list); | ||
| clear_opp_config: | ||
| dev_pm_opp_clear_config(priv->opp_token); | ||
|
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| return ret; | ||
| } | ||
|
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| static void airoha_cpufreq_remove(struct platform_device *pdev) | ||
| { | ||
| struct airoha_cpufreq_priv *priv = platform_get_drvdata(pdev); | ||
|
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| platform_device_unregister(priv->cpufreq_dt); | ||
|
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| dev_pm_domain_detach_list(priv->pd_list); | ||
|
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| dev_pm_opp_clear_config(priv->opp_token); | ||
| } | ||
|
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| static struct platform_driver airoha_cpufreq_driver = { | ||
| .probe = airoha_cpufreq_probe, | ||
| .remove = airoha_cpufreq_remove, | ||
| .driver = { | ||
| .name = "airoha-cpufreq", | ||
| }, | ||
| }; | ||
|
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| static const struct of_device_id airoha_cpufreq_match_list[] __initconst = { | ||
| { .compatible = "airoha,en7581" }, | ||
| {}, | ||
| }; | ||
| MODULE_DEVICE_TABLE(of, airoha_cpufreq_match_list); | ||
|
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| static int __init airoha_cpufreq_init(void) | ||
| { | ||
| struct device_node *np = of_find_node_by_path("/"); | ||
| const struct of_device_id *match; | ||
| int ret; | ||
|
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| if (!np) | ||
| return -ENODEV; | ||
|
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| match = of_match_node(airoha_cpufreq_match_list, np); | ||
| of_node_put(np); | ||
| if (!match) | ||
| return -ENODEV; | ||
|
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| ret = platform_driver_register(&airoha_cpufreq_driver); | ||
| if (unlikely(ret < 0)) | ||
| return ret; | ||
|
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| cpufreq_pdev = platform_device_register_data(NULL, "airoha-cpufreq", | ||
| -1, match, sizeof(*match)); | ||
| ret = PTR_ERR_OR_ZERO(cpufreq_pdev); | ||
| if (ret) | ||
| platform_driver_unregister(&airoha_cpufreq_driver); | ||
|
|
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| return ret; | ||
| } | ||
| module_init(airoha_cpufreq_init); | ||
|
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| static void __exit airoha_cpufreq_exit(void) | ||
| { | ||
| platform_device_unregister(cpufreq_pdev); | ||
| platform_driver_unregister(&airoha_cpufreq_driver); | ||
| } | ||
| module_exit(airoha_cpufreq_exit); | ||
|
|
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| MODULE_AUTHOR("Christian Marangi <ansuelsmth@gmail.com>"); | ||
| MODULE_DESCRIPTION("CPUfreq driver for Airoha SoCs"); | ||
| MODULE_LICENSE("GPL"); |
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