-
Notifications
You must be signed in to change notification settings - Fork 0
Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
Merge tag 'for-linus-20160112' of git://git.infradead.org/linux-mtd
Pull MTD updates from Brian Norris:
"Generic MTD:
- populate the MTD device 'of_node' field (and get a proper 'of_node'
symlink in sysfs)
This yielded some new helper functions, and changes across a
variety of drivers
- partitioning cleanups, to prepare for better device-tree based
partitioning in the future
Eliminate a lot of boilerplate for drivers that want to use
OF-based partition parsing
The DT bindings for this didn't settle yet, so most non-cleanup
portions are deferred for a future release
NAND:
- embed a struct mtd_info inside struct nand_chip
This is really long overdue; too many drivers have to do the same
silly boilerplate to allocate and link up two "independent"
structs, when in fact, everyone is assuming there is an exact 1:1
relationship between a NAND chips struct and its underlying MTD.
This aids improved helpers and should make certain abstractions
easier in the future.
Also causes a lot of churn, helped along by some automated code
transformations
- add more core support for detecting (and "correcting") bitflips in
erased pages; requires opt-in by drivers, but at least we kill a
few bad implementations and hopefully stave off future ones
- pxa3xx_nand: cleanups, a few fixes, and PM improvements
- new JZ4780 NAND driver
SPI NOR:
- provide default erase function, for controllers that just want to
send the SECTOR_ERASE command directly
- fix some module auto-loading issues with device tree
("jedec,spi-nor")
- error handling fixes
- new Mediatek QSPI flash driver
Other:
- cfi: force valid geometry Kconfig (finally!)
This one used to trip up randconfigs occasionally, since bots
aren't deterred by big scary "advanced configuration" menus
More? Probably. See the commit logs"
* tag 'for-linus-20160112' of git://git.infradead.org/linux-mtd: (168 commits)
mtd: jz4780_nand: replace if/else blocks with switch/case
mtd: nand: jz4780: Update ecc correction error codes
mtd: nandsim: use nand_get_controller_data()
mtd: jz4780_nand: remove useless mtd->priv = chip assignment
staging: mt29f_spinand: make use of nand_set/get_controller_data() helpers
mtd: nand: make use of nand_set/get_controller_data() helpers
ARM: make use of nand_set/get_controller_data() helpers
mtd: nand: add helpers to access ->priv
mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs
mtd: nand: jz4740: remove custom 'erased check' implementation
mtd: nand: diskonchip: remove custom 'erased check' implementation
mtd: nand: davinci: remove custom 'erased check' implementation
mtd: nand: use nand_check_erased_ecc_chunk in default ECC read functions
mtd: nand: return consistent error codes in ecc.correct() implementations
doc: dt: mtd: new binding for jz4780-{nand,bch}
mtd: cfi_cmdset_0001: fixing memory leak and handling failed kmalloc
mtd: spi-nor: wait until lock/unlock operations are ready
mtd: tests: consolidate kmalloc/memset 0 call to kzalloc
jffs2: use to_delayed_work
mtd: nand: assign reasonable default name for NAND drivers
...- Loading branch information
Showing
128 changed files
with
3,469 additions
and
1,753 deletions.
There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
86 changes: 86 additions & 0 deletions
86
Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,86 @@ | ||
| * Ingenic JZ4780 NAND/BCH | ||
|
|
||
| This file documents the device tree bindings for NAND flash devices on the | ||
| JZ4780. NAND devices are connected to the NEMC controller (described in | ||
| memory-controllers/ingenic,jz4780-nemc.txt), and thus NAND device nodes must | ||
| be children of the NEMC node. | ||
|
|
||
| Required NAND controller device properties: | ||
| - compatible: Should be set to "ingenic,jz4780-nand". | ||
| - reg: For each bank with a NAND chip attached, should specify a bank number, | ||
| an offset of 0 and a size of 0x1000000 (i.e. the whole NEMC bank). | ||
|
|
||
| Optional NAND controller device properties: | ||
| - ingenic,bch-controller: To make use of the hardware BCH controller, this | ||
| property must contain a phandle for the BCH controller node. The required | ||
| properties for this node are described below. If this is not specified, | ||
| software BCH will be used instead. | ||
|
|
||
| Optional children nodes: | ||
| - Individual NAND chips are children of the NAND controller node. | ||
|
|
||
| Required children node properties: | ||
| - reg: An integer ranging from 1 to 6 representing the CS line to use. | ||
|
|
||
| Optional children node properties: | ||
| - nand-ecc-step-size: ECC block size in bytes. | ||
| - nand-ecc-strength: ECC strength (max number of correctable bits). | ||
| - nand-ecc-mode: String, operation mode of the NAND ecc mode. "hw" by default | ||
| - nand-on-flash-bbt: boolean to enable on flash bbt option, if not present false | ||
| - rb-gpios: GPIO specifier for the busy pin. | ||
| - wp-gpios: GPIO specifier for the write protect pin. | ||
|
|
||
| Optional child node of NAND chip nodes: | ||
| - partitions: see Documentation/devicetree/bindings/mtd/partition.txt | ||
|
|
||
| Example: | ||
|
|
||
| nemc: nemc@13410000 { | ||
| ... | ||
|
|
||
| nandc: nand-controller@1 { | ||
| compatible = "ingenic,jz4780-nand"; | ||
| reg = <1 0 0x1000000>; /* Bank 1 */ | ||
|
|
||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
|
|
||
| ingenic,bch-controller = <&bch>; | ||
|
|
||
| nand@1 { | ||
| reg = <1>; | ||
|
|
||
| nand-ecc-step-size = <1024>; | ||
| nand-ecc-strength = <24>; | ||
| nand-ecc-mode = "hw"; | ||
| nand-on-flash-bbt; | ||
|
|
||
| rb-gpios = <&gpa 20 GPIO_ACTIVE_LOW>; | ||
| wp-gpios = <&gpf 22 GPIO_ACTIVE_LOW>; | ||
|
|
||
| partitions { | ||
| #address-cells = <2>; | ||
| #size-cells = <2>; | ||
| ... | ||
| } | ||
| }; | ||
| }; | ||
| }; | ||
|
|
||
| The BCH controller is a separate SoC component used for error correction on | ||
| NAND devices. The following is a description of the device properties for a | ||
| BCH controller. | ||
|
|
||
| Required BCH properties: | ||
| - compatible: Should be set to "ingenic,jz4780-bch". | ||
| - reg: Should specify the BCH controller registers location and length. | ||
| - clocks: Clock for the BCH controller. | ||
|
|
||
| Example: | ||
|
|
||
| bch: bch@134d0000 { | ||
| compatible = "ingenic,jz4780-bch"; | ||
| reg = <0x134d0000 0x10000>; | ||
|
|
||
| clocks = <&cgu JZ4780_CLK_BCH>; | ||
| }; |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,41 @@ | ||
| * Serial NOR flash controller for MTK MT81xx (and similar) | ||
|
|
||
| Required properties: | ||
| - compatible: should be "mediatek,mt8173-nor"; | ||
| - reg: physical base address and length of the controller's register | ||
| - clocks: the phandle of the clocks needed by the nor controller | ||
| - clock-names: the names of the clocks | ||
| the clocks should be named "spi" and "sf". "spi" is used for spi bus, | ||
| and "sf" is used for controller, these are the clocks witch | ||
| hardware needs to enabling nor flash and nor flash controller. | ||
| See Documentation/devicetree/bindings/clock/clock-bindings.txt for details. | ||
| - #address-cells: should be <1> | ||
| - #size-cells: should be <0> | ||
|
|
||
| The SPI flash must be a child of the nor_flash node and must have a | ||
| compatible property. Also see jedec,spi-nor.txt. | ||
|
|
||
| Required properties: | ||
| - compatible: May include a device-specific string consisting of the manufacturer | ||
| and name of the chip. Must also include "jedec,spi-nor" for any | ||
| SPI NOR flash that can be identified by the JEDEC READ ID opcode (0x9F). | ||
| - reg : Chip-Select number | ||
|
|
||
| Example: | ||
|
|
||
| nor_flash: spi@1100d000 { | ||
| compatible = "mediatek,mt8173-nor"; | ||
| reg = <0 0x1100d000 0 0xe0>; | ||
| clocks = <&pericfg CLK_PERI_SPI>, | ||
| <&topckgen CLK_TOP_SPINFI_IFR_SEL>; | ||
| clock-names = "spi", "sf"; | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
| status = "disabled"; | ||
|
|
||
| flash@0 { | ||
| compatible = "jedec,spi-nor"; | ||
| reg = <0>; | ||
| }; | ||
| }; | ||
|
|
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Oops, something went wrong.