MIPS: math-emu: Replace DP_MBITS with DP_FBITS and SP_MBITS with SP_F…

…BITS.

Both were defined as 23 rsp. 52 though the mentissa is actually a bit more
than the fraction.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

arch/mips/math-emu/dp_add.c

@@ -153,7 +153,7 @@ union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y)
 		xe = xe;
 		xs = xs;
 
-		if (xm >> (DP_MBITS + 1 + 3)) { /* carry out */
+		if (xm >> (DP_FBITS + 1 + 3)) { /* carry out */
 			xm = XDPSRS1(xm);
 			xe++;
 		}
@@ -172,7 +172,7 @@ union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y)
 					      IEEE754_RD);
 
 		/* normalize to rounding precision */
-		while ((xm >> (DP_MBITS + 3)) == 0) {
+		while ((xm >> (DP_FBITS + 3)) == 0) {
 			xm <<= 1;
 			xe--;
 		}

arch/mips/math-emu/dp_div.c

@@ -129,7 +129,7 @@ union ieee754dp ieee754dp_div(union ieee754dp x, union ieee754dp y)
 		int re = xe - ye;
 		u64 bm;
 
-		for (bm = DP_MBIT(DP_MBITS + 2); bm; bm >>= 1) {
+		for (bm = DP_MBIT(DP_FBITS + 2); bm; bm >>= 1) {
 			if (xm >= ym) {
 				xm -= ym;
 				rm |= bm;
@@ -146,7 +146,7 @@ union ieee754dp ieee754dp_div(union ieee754dp x, union ieee754dp y)
 
 		/* normalise rm to rounding precision ?
 		 */
-		while ((rm >> (DP_MBITS + 3)) == 0) {
+		while ((rm >> (DP_FBITS + 3)) == 0) {
 			rm <<= 1;
 			re--;
 		}

arch/mips/math-emu/dp_fint.c

@@ -52,8 +52,8 @@ union ieee754dp ieee754dp_fint(int x)
 	}
 
 	/* normalize - result can never be inexact or overflow */
-	xe = DP_MBITS;
-	while ((xm >> DP_MBITS) == 0) {
+	xe = DP_FBITS;
+	while ((xm >> DP_FBITS) == 0) {
 		xm <<= 1;
 		xe--;
 	}

arch/mips/math-emu/dp_flong.c

@@ -52,15 +52,15 @@ union ieee754dp ieee754dp_flong(s64 x)
 	}
 
 	/* normalize */
-	xe = DP_MBITS + 3;
-	if (xm >> (DP_MBITS + 1 + 3)) {
+	xe = DP_FBITS + 3;
+	if (xm >> (DP_FBITS + 1 + 3)) {
 		/* shunt out overflow bits */
-		while (xm >> (DP_MBITS + 1 + 3)) {
+		while (xm >> (DP_FBITS + 1 + 3)) {
 			XDPSRSX1();
 		}
 	} else {
 		/* normalize in grs extended double precision */
-		while ((xm >> (DP_MBITS + 3)) == 0) {
+		while ((xm >> (DP_FBITS + 3)) == 0) {
 			xm <<= 1;
 			xe--;
 		}

arch/mips/math-emu/dp_fsp.c

@@ -44,16 +44,16 @@ union ieee754dp ieee754dp_fsp(union ieee754sp x)
 		return ieee754dp_nanxcpt(builddp(xs,
 						 DP_EMAX + 1 + DP_EBIAS,
 						 ((u64) xm
-						  << (DP_MBITS -
-						      SP_MBITS))), "fsp",
+						  << (DP_FBITS -
+						      SP_FBITS))), "fsp",
 					 x);
 	case IEEE754_CLASS_INF:
 		return ieee754dp_inf(xs);
 	case IEEE754_CLASS_ZERO:
 		return ieee754dp_zero(xs);
 	case IEEE754_CLASS_DNORM:
 		/* normalize */
-		while ((xm >> SP_MBITS) == 0) {
+		while ((xm >> SP_FBITS) == 0) {
 			xm <<= 1;
 			xe--;
 		}
@@ -69,5 +69,5 @@ union ieee754dp ieee754dp_fsp(union ieee754sp x)
 	xm &= ~SP_HIDDEN_BIT;
 
 	return builddp(xs, xe + DP_EBIAS,
-		       (u64) xm << (DP_MBITS - SP_MBITS));
+		       (u64) xm << (DP_FBITS - SP_FBITS));
 }

arch/mips/math-emu/dp_modf.c

@@ -54,24 +54,24 @@ union ieee754dp ieee754dp_modf(union ieee754dp x, union ieee754dp *ip)
 		*ip = ieee754dp_zero(xs);
 		return x;
 	}
-	if (xe >= DP_MBITS) {
+	if (xe >= DP_FBITS) {
 		*ip = x;
 		return ieee754dp_zero(xs);
 	}
 	/* generate ipart mantissa by clearing bottom bits
 	 */
 	*ip = builddp(xs, xe + DP_EBIAS,
-		      ((xm >> (DP_MBITS - xe)) << (DP_MBITS - xe)) &
+		      ((xm >> (DP_FBITS - xe)) << (DP_FBITS - xe)) &
 		      ~DP_HIDDEN_BIT);
 
 	/* generate fpart mantissa by clearing top bits
 	 * and normalizing (must be able to normalize)
 	 */
-	xm = (xm << (64 - (DP_MBITS - xe))) >> (64 - (DP_MBITS - xe));
+	xm = (xm << (64 - (DP_FBITS - xe))) >> (64 - (DP_FBITS - xe));
 	if (xm == 0)
 		return ieee754dp_zero(xs);
 
-	while ((xm >> DP_MBITS) == 0) {
+	while ((xm >> DP_FBITS) == 0) {
 		xm <<= 1;
 		xe--;
 	}

arch/mips/math-emu/dp_mul.c

@@ -113,8 +113,8 @@ union ieee754dp ieee754dp_mul(union ieee754dp x, union ieee754dp y)
 		u64 rm;
 
 		/* shunt to top of word */
-		xm <<= 64 - (DP_MBITS + 1);
-		ym <<= 64 - (DP_MBITS + 1);
+		xm <<= 64 - (DP_FBITS + 1);
+		ym <<= 64 - (DP_FBITS + 1);
 
 		/* multiply 32bits xm,ym to give high 32bits rm with stickness
 		 */
@@ -162,13 +162,13 @@ union ieee754dp ieee754dp_mul(union ieee754dp x, union ieee754dp y)
 		 */
 		if ((s64) rm < 0) {
 			rm =
-			    (rm >> (64 - (DP_MBITS + 1 + 3))) |
-			    ((rm << (DP_MBITS + 1 + 3)) != 0);
+			    (rm >> (64 - (DP_FBITS + 1 + 3))) |
+			    ((rm << (DP_FBITS + 1 + 3)) != 0);
 			re++;
 		} else {
 			rm =
-			    (rm >> (64 - (DP_MBITS + 1 + 3 + 1))) |
-			    ((rm << (DP_MBITS + 1 + 3 + 1)) != 0);
+			    (rm >> (64 - (DP_FBITS + 1 + 3 + 1))) |
+			    ((rm << (DP_FBITS + 1 + 3 + 1)) != 0);
 		}
 		assert(rm & (DP_HIDDEN_BIT << 3));
 		DPNORMRET2(rs, re, rm, "mul", x, y);

arch/mips/math-emu/dp_sub.c

@@ -158,7 +158,7 @@ union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y)
 		xe = xe;
 		xs = xs;
 
-		if (xm >> (DP_MBITS + 1 + 3)) { /* carry out */
+		if (xm >> (DP_FBITS + 1 + 3)) { /* carry out */
 			xm = XDPSRS1(xm);	/* shift preserving sticky */
 			xe++;
 		}
@@ -181,7 +181,7 @@ union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y)
 
 		/* normalize to rounding precision
 		 */
-		while ((xm >> (DP_MBITS + 3)) == 0) {
+		while ((xm >> (DP_FBITS + 3)) == 0) {
 			xm <<= 1;
 			xe--;
 		}

arch/mips/math-emu/dp_tint.c

@@ -54,9 +54,9 @@ int ieee754dp_tint(union ieee754dp x)
 		return ieee754si_xcpt(ieee754si_indef(), "dp_tint", x);
 	}
 	/* oh gawd */
-	if (xe > DP_MBITS) {
-		xm <<= xe - DP_MBITS;
-	} else if (xe < DP_MBITS) {
+	if (xe > DP_FBITS) {
+		xm <<= xe - DP_FBITS;
+	} else if (xe < DP_FBITS) {
 		u64 residue;
 		int round;
 		int sticky;
@@ -68,10 +68,10 @@ int ieee754dp_tint(union ieee754dp x)
 			sticky = residue != 0;
 			xm = 0;
 		} else {
-			residue = xm << (64 - DP_MBITS + xe);
+			residue = xm << (64 - DP_FBITS + xe);
 			round = (residue >> 63) != 0;
 			sticky = (residue << 1) != 0;
-			xm >>= DP_MBITS - xe;
+			xm >>= DP_FBITS - xe;
 		}
 		/* Note: At this point upper 32 bits of xm are guaranteed
 		   to be zero */

arch/mips/math-emu/dp_tlong.c

@@ -57,9 +57,9 @@ s64 ieee754dp_tlong(union ieee754dp x)
 		return ieee754di_xcpt(ieee754di_indef(), "dp_tlong", x);
 	}
 	/* oh gawd */
-	if (xe > DP_MBITS) {
-		xm <<= xe - DP_MBITS;
-	} else if (xe < DP_MBITS) {
+	if (xe > DP_FBITS) {
+		xm <<= xe - DP_FBITS;
+	} else if (xe < DP_FBITS) {
 		u64 residue;
 		int round;
 		int sticky;
@@ -75,10 +75,10 @@ s64 ieee754dp_tlong(union ieee754dp x)
 			* so we do it in two steps. Be aware that xe
 			* may be -1 */
 			residue = xm << (xe + 1);
-			residue <<= 63 - DP_MBITS;
+			residue <<= 63 - DP_FBITS;
 			round = (residue >> 63) != 0;
 			sticky = (residue << 1) != 0;
-			xm >>= DP_MBITS - xe;
+			xm >>= DP_FBITS - xe;
 		}
 		odd = (xm & 0x1) != 0x0;
 		switch (ieee754_csr.rm) {

arch/mips/math-emu/ieee754dp.c

@@ -43,7 +43,7 @@ int ieee754dp_isnan(union ieee754dp x)
 int ieee754dp_issnan(union ieee754dp x)
 {
 	assert(ieee754dp_isnan(x));
-	return ((DPMANT(x) & DP_MBIT(DP_MBITS-1)) == DP_MBIT(DP_MBITS-1));
+	return ((DPMANT(x) & DP_MBIT(DP_FBITS-1)) == DP_MBIT(DP_FBITS-1));
 }
 
 
@@ -73,7 +73,7 @@ union ieee754dp __cold ieee754dp_nanxcpt(union ieee754dp r, const char *op, ...)
 
 	if (!ieee754_setandtestcx(IEEE754_INVALID_OPERATION)) {
 		/* not enabled convert to a quiet NaN */
-		DPMANT(r) &= (~DP_MBIT(DP_MBITS-1));
+		DPMANT(r) &= (~DP_MBIT(DP_FBITS-1));
 		if (ieee754dp_isnan(r))
 			return r;
 		else
@@ -136,7 +136,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm)
 {
 	assert(xm);		/* we don't gen exact zeros (probably should) */
 
-	assert((xm >> (DP_MBITS + 1 + 3)) == 0);	/* no execess */
+	assert((xm >> (DP_FBITS + 1 + 3)) == 0);	/* no execess */
 	assert(xm & (DP_HIDDEN_BIT << 3));
 
 	if (xe < DP_EMIN) {
@@ -165,7 +165,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm)
 		}
 
 		if (xe == DP_EMIN - 1
-				&& get_rounding(sn, xm) >> (DP_MBITS + 1 + 3))
+				&& get_rounding(sn, xm) >> (DP_FBITS + 1 + 3))
 		{
 			/* Not tiny after rounding */
 			ieee754_setcx(IEEE754_INEXACT);
@@ -195,7 +195,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm)
 		xm = get_rounding(sn, xm);
 		/* adjust exponent for rounding add overflowing
 		 */
-		if (xm >> (DP_MBITS + 3 + 1)) {
+		if (xm >> (DP_FBITS + 3 + 1)) {
 			/* add causes mantissa overflow */
 			xm >>= 1;
 			xe++;
@@ -204,7 +204,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm)
 	/* strip grs bits */
 	xm >>= 3;
 
-	assert((xm >> (DP_MBITS + 1)) == 0);	/* no execess */
+	assert((xm >> (DP_FBITS + 1)) == 0);	/* no execess */
 	assert(xe >= DP_EMIN);
 
 	if (xe > DP_EMAX) {
@@ -237,7 +237,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm)
 			ieee754_setcx(IEEE754_UNDERFLOW);
 		return builddp(sn, DP_EMIN - 1 + DP_EBIAS, xm);
 	} else {
-		assert((xm >> (DP_MBITS + 1)) == 0);	/* no execess */
+		assert((xm >> (DP_FBITS + 1)) == 0);	/* no execess */
 		assert(xm & DP_HIDDEN_BIT);
 
 		return builddp(sn, xe + DP_EBIAS, xm & ~DP_HIDDEN_BIT);

arch/mips/math-emu/ieee754dp.h

@@ -32,7 +32,7 @@
 
 /* 3bit extended double precision sticky right shift */
 #define XDPSRS(v,rs)	\
-	((rs > (DP_MBITS+3))?1:((v) >> (rs)) | ((v) << (64-(rs)) != 0))
+	((rs > (DP_FBITS+3))?1:((v) >> (rs)) | ((v) << (64-(rs)) != 0))
 
 #define XDPSRSX1() \
 	(xe++, (xm = (xm >> 1) | (xm & 1)))
@@ -42,7 +42,7 @@
 
 /* convert denormal to normalized with extended exponent */
 #define DPDNORMx(m,e) \
-	while ((m >> DP_MBITS) == 0) { m <<= 1; e--; }
+	while ((m >> DP_FBITS) == 0) { m <<= 1; e--; }
 #define DPDNORMX	DPDNORMx(xm, xe)
 #define DPDNORMY	DPDNORMx(ym, ye)
 
@@ -53,7 +53,7 @@ static inline union ieee754dp builddp(int s, int bx, u64 m)
 	assert((s) == 0 || (s) == 1);
 	assert((bx) >= DP_EMIN - 1 + DP_EBIAS
 	       && (bx) <= DP_EMAX + 1 + DP_EBIAS);
-	assert(((m) >> DP_MBITS) == 0);
+	assert(((m) >> DP_FBITS) == 0);
 
 	r.parts.sign = s;
 	r.parts.bexp = bx;

arch/mips/math-emu/ieee754int.h

@@ -31,19 +31,19 @@
 #define DP_EBIAS	1023
 #define DP_EMIN		(-1022)
 #define DP_EMAX		1023
-#define DP_MBITS	52
+#define DP_FBITS	52
 
 #define SP_EBIAS	127
 #define SP_EMIN		(-126)
 #define SP_EMAX		127
-#define SP_MBITS	23
+#define SP_FBITS	23
 
 #define DP_MBIT(x)	((u64)1 << (x))
-#define DP_HIDDEN_BIT	DP_MBIT(DP_MBITS)
+#define DP_HIDDEN_BIT	DP_MBIT(DP_FBITS)
 #define DP_SIGN_BIT	DP_MBIT(63)
 
 #define SP_MBIT(x)	((u32)1 << (x))
-#define SP_HIDDEN_BIT	SP_MBIT(SP_MBITS)
+#define SP_HIDDEN_BIT	SP_MBIT(SP_FBITS)
 #define SP_SIGN_BIT	SP_MBIT(31)
 
 
@@ -94,7 +94,7 @@ static inline int ieee754_tstx(void)
 	if (ve == SP_EMAX+1+SP_EBIAS) {					\
 		if (vm == 0)						\
 			vc = IEEE754_CLASS_INF;				\
-		else if (vm & SP_MBIT(SP_MBITS-1))			\
+		else if (vm & SP_MBIT(SP_FBITS-1))			\
 			vc = IEEE754_CLASS_SNAN;			\
 	else								\
 		vc = IEEE754_CLASS_QNAN;				\
@@ -128,7 +128,7 @@ static inline int ieee754_tstx(void)
 	if (ve == DP_EMAX+1+DP_EBIAS) {					\
 		if (vm == 0)						\
 			vc = IEEE754_CLASS_INF;				\
-		else if (vm & DP_MBIT(DP_MBITS-1))			\
+		else if (vm & DP_MBIT(DP_FBITS-1))			\
 			vc = IEEE754_CLASS_SNAN;			\
 		else							\
 			vc = IEEE754_CLASS_QNAN;			\