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clk: imx: disable the pfd when set pfdv2 clock rate
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It is possible that a PFD is enabled in HW but not in SW. That
means the enable count & prepare count of the PFD clock is '0',
so the 'CLK_SET_RATE' flag can do nothing when the rate is changed
while the PFD is hw enabled. In order to safely change the pfd
rate, we can disable the PFD directly if it is hw enabled but not
used by SW end user.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20210914065208.3582128-7-ping.bai@nxp.com
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
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Jacky Bai authored and Abel Vesa committed Sep 30, 2021
1 parent 75c6f1a commit ae8a10d
Showing 1 changed file with 11 additions and 2 deletions.
13 changes: 11 additions & 2 deletions drivers/clk/imx/clk-pfdv2.c
Original file line number Diff line number Diff line change
Expand Up @@ -161,8 +161,17 @@ static int clk_pfdv2_set_rate(struct clk_hw *hw, unsigned long rate,
if (!rate)
return -EINVAL;

/* PFD can NOT change rate without gating */
WARN_ON(clk_pfdv2_is_enabled(hw));
/*
* PFD can NOT change rate without gating.
* as the PFDs may enabled in HW by default but no
* consumer used it, the enable count is '0', so the
* 'SET_RATE_GATE' can NOT help on blocking the set_rate
* ops especially for 'assigned-clock-xxx'. In order
* to simplify the case, just disable the PFD if it is
* enabled in HW but not in SW.
*/
if (clk_pfdv2_is_enabled(hw))
clk_pfdv2_disable(hw);

tmp = tmp * 18 + rate / 2;
do_div(tmp, rate);
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